[PATCH v2 0/5] drm/msm: Add display configuration for msm8x16

Stephane Viau sviau at codeaurora.org
Tue Mar 24 12:05:57 PDT 2015


This patch set contains a couple modifications of the MDP5 register
description, followed by the MDP hw configuration of the msm8016 and
msm8916 chipsets.

v2: add CTL flush register's hardware mask [pointed by Archit]

Stephane Viau (5):
  drm/msm/mdp5: Update headers (introduce MDP5 domain)
  drm/msm/mdp5: Separate MDP5 domain from MDSS domain
  drm/msm/mdp5: Update headers (remove enum mdp5_client_id)
  drm/msm/mdp5: Get SMP client list from mdp5_cfg
  drm/msm/mdp5: Add hardware configuration for msm8x16

 drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h | 230 ++++++++++++++++----------------
 drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c |  80 ++++++++++-
 drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h |   2 +
 drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.c |  20 +--
 drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c |  26 ++--
 drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c |   9 +-
 drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h |   2 +-
 drivers/gpu/drm/msm/mdp/mdp5/mdp5_smp.c |  64 ++++-----
 8 files changed, 258 insertions(+), 175 deletions(-)

-- 
Qualcomm Innovation Center, Inc.

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project



More information about the dri-devel mailing list