[PATCH 2/2] drm/amdkfd: make the sdma vm init to be asic specific
Alex Deucher
alexdeucher at gmail.com
Tue May 5 09:28:03 PDT 2015
On Tue, May 5, 2015 at 5:03 AM, Oded Gabbay <oded.gabbay at gmail.com> wrote:
> Signed-off-by: Oded Gabbay <oded.gabbay at gmail.com>
> ---
> drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 15 +--------------
> drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h | 3 +++
> .../gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c | 16 ++++++++++++++++
> drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c | 8 ++++++++
> 4 files changed, 28 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> index 69af73f..1eb1022 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> @@ -614,19 +614,6 @@ static void deallocate_sdma_queue(struct device_queue_manager *dqm,
> set_bit(sdma_queue_id, (unsigned long *)&dqm->sdma_bitmap);
> }
>
> -static void init_sdma_vm(struct device_queue_manager *dqm, struct queue *q,
> - struct qcm_process_device *qpd)
> -{
> - uint32_t value = SDMA_ATC;
> -
> - if (q->process->is_32bit_user_mode)
> - value |= SDMA_VA_PTR32 | get_sh_mem_bases_32(qpd_to_pdd(qpd));
> - else
> - value |= SDMA_VA_SHARED_BASE(get_sh_mem_bases_nybble_64(
> - qpd_to_pdd(qpd)));
> - q->properties.sdma_vm_addr = value;
> -}
> -
> static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm,
> struct queue *q,
> struct qcm_process_device *qpd)
> @@ -649,7 +636,7 @@ static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm,
> pr_debug(" sdma queue id: %d\n", q->properties.sdma_queue_id);
> pr_debug(" sdma engine id: %d\n", q->properties.sdma_engine_id);
>
> - init_sdma_vm(dqm, q, qpd);
> + dqm->ops_asic_specific.init_sdma_vm(dqm, q, qpd);
> retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj,
> &q->gart_mqd_addr, &q->properties);
> if (retval != 0) {
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
> index 650ae1c..57278e2 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
> @@ -130,6 +130,9 @@ struct device_queue_manager_asic_ops {
> enum cache_policy alternate_policy,
> void __user *alternate_aperture_base,
> uint64_t alternate_aperture_size);
> + void (*init_sdma_vm)(struct device_queue_manager *dqm,
> + struct queue *q,
> + struct qcm_process_device *qpd);
Maybe call it, init_vm() in cause you need to do something queue
specific for other rings? Either way, this series is:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> };
>
> /**
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c
> index 292d13f..9ce8a20 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c
> @@ -33,12 +33,15 @@ static bool set_cache_memory_policy_cik(struct device_queue_manager *dqm,
> static int register_process_cik(struct device_queue_manager *dqm,
> struct qcm_process_device *qpd);
> static int initialize_cpsch_cik(struct device_queue_manager *dqm);
> +static void init_sdma_vm(struct device_queue_manager *dqm, struct queue *q,
> + struct qcm_process_device *qpd);
>
> void device_queue_manager_init_cik(struct device_queue_manager_asic_ops *ops)
> {
> ops->set_cache_memory_policy = set_cache_memory_policy_cik;
> ops->register_process = register_process_cik;
> ops->initialize = initialize_cpsch_cik;
> + ops->init_sdma_vm = init_sdma_vm;
> }
>
> static uint32_t compute_sh_mem_bases_64bit(unsigned int top_address_nybble)
> @@ -129,6 +132,19 @@ static int register_process_cik(struct device_queue_manager *dqm,
> return 0;
> }
>
> +static void init_sdma_vm(struct device_queue_manager *dqm, struct queue *q,
> + struct qcm_process_device *qpd)
> +{
> + uint32_t value = SDMA_ATC;
> +
> + if (q->process->is_32bit_user_mode)
> + value |= SDMA_VA_PTR32 | get_sh_mem_bases_32(qpd_to_pdd(qpd));
> + else
> + value |= SDMA_VA_SHARED_BASE(get_sh_mem_bases_nybble_64(
> + qpd_to_pdd(qpd)));
> + q->properties.sdma_vm_addr = value;
> +}
> +
> static int initialize_cpsch_cik(struct device_queue_manager *dqm)
> {
> return init_pipelines(dqm, get_pipes_num(dqm), get_first_pipe(dqm));
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c
> index 8b00ccf..4c15212 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c
> @@ -32,6 +32,8 @@ static bool set_cache_memory_policy_vi(struct device_queue_manager *dqm,
> static int register_process_vi(struct device_queue_manager *dqm,
> struct qcm_process_device *qpd);
> static int initialize_cpsch_vi(struct device_queue_manager *dqm);
> +static void init_sdma_vm(struct device_queue_manager *dqm, struct queue *q,
> + struct qcm_process_device *qpd);
>
> void device_queue_manager_init_vi(struct device_queue_manager_asic_ops *ops)
> {
> @@ -40,6 +42,7 @@ void device_queue_manager_init_vi(struct device_queue_manager_asic_ops *ops)
> ops->set_cache_memory_policy = set_cache_memory_policy_vi;
> ops->register_process = register_process_vi;
> ops->initialize = initialize_cpsch_vi;
> + ops->init_sdma_vm = init_sdma_vm;
> }
>
> static bool set_cache_memory_policy_vi(struct device_queue_manager *dqm,
> @@ -58,6 +61,11 @@ static int register_process_vi(struct device_queue_manager *dqm,
> return -1;
> }
>
> +static void init_sdma_vm(struct device_queue_manager *dqm, struct queue *q,
> + struct qcm_process_device *qpd)
> +{
> +}
> +
> static int initialize_cpsch_vi(struct device_queue_manager *dqm)
> {
> return 0;
> --
> 1.9.1
>
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