[Intel-gfx] [PATCH] drm/vblank: Fixup and document timestamp update/read barriers
peter at hurleysoftware.com
Tue May 5 12:01:20 PDT 2015
On 05/05/2015 11:57 AM, Peter Hurley wrote:
> On 05/05/2015 11:42 AM, Daniel Vetter wrote:
>> I'm also somewhat confused about how you to a line across both cpus for
>> barriers because barriers only have cpu-local effects (which is why we
>> always need a barrier on both ends of a transaction).
I'm sorry if my barrier notation confuses you; I find that it clearly
identifies matching pairs.
Also, there is a distinction between "can be visible" and "must be visible";
the load and stores themselves are not cpu-local.
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