[PULL] drm-intel-next

Daniel Vetter daniel.vetter at ffwll.ch
Mon May 18 01:31:05 PDT 2015

Hi Dave,

- skl plane scaler support (Chandra Kondru)
- enable hsw cmd parser (Daniel and fix from Rebecca Palmer)
- skl dc5/6 support (low power display modes) from Suketu&Sunil
- dp compliance testing patches (Todd Previte)
- dp link training optimization (Mika Kahola)
- fixes to make skl resume work (Damien)
- rework modeset code to fully use atomic state objects (Ander&Maarten)
- pile of bxt w/a patchs from Nick Hoath
- (linear) partial gtt mmap support (Joonas Lahtinen)

Cheers, Daniel

The following changes since commit e1dee1973c74a0408b108d88c57a15be8a2d6d84:

  Merge tag 'drm-intel-next-2015-04-23-fixed' of git://anongit.freedesktop.org/drm-intel into drm-next (2015-05-08 20:51:06 +1000)

are available in the git repository at:

  git://anongit.freedesktop.org/drm-intel tags/drm-intel-next-2015-05-08

for you to fetch changes up to 214a2b7fab215b1e979fbae51225b01b8fc58288:

  drm/i915: Update DRIVER_DATE to 20150508 (2015-05-08 17:38:19 +0200)

- skl plane scaler support (Chandra Kondru)
- enable hsw cmd parser (Daniel and fix from Rebecca Palmer)
- skl dc5/6 support (low power display modes) from Suketu&Sunil
- dp compliance testing patches (Todd Previte)
- dp link training optimization (Mika Kahola)
- fixes to make skl resume work (Damien)
- rework modeset code to fully use atomic state objects (Ander&Maarten)
- pile of bxt w/a patchs from Nick Hoath
- (linear) partial gtt mmap support (Joonas Lahtinen)

A.Sunil Kamath (2):
      drm/i915/skl: Implement enable/disable for Display C5 state.
      Implement enable/disable for Display C6 state

Ander Conselvan de Oliveira (28):
      drm/i915: Don't check for NULL before freeing state
      drm/i915: Call drm helpers when duplicating crtc and plane states
      drm/i915: Use for_each_connector_in_state helper macro
      drm/i915: Extract mode_changed computation out of stage_output_config()
      drm/i915: Add crtc states before calling compute_config()
      drm/i915: Don't pretend we can calculate multiple pipe_configs
      drm/i915: Calculate a new pipe_config based on new enabled state
      drm/i915: Remove all *_pipes flags from modeset
      drm/i915: Remove saved_mode from __intel_set_mode()
      drm/i915: Move compute part of __intel_set_mode() to separate function
      drm/i915: Simplify error handling in __intel_set_mode()
      drm/i915: Don't modeset with old mode when set_crtc fails
      drm/i915: Add primary plane to atomic state in legacy modeset
      drm/i915: Delete fb, x and y parameters from mode set functions
      drm/i915: Don't use struct intel_set_config *_changed flags
      drm/i915: Don't use staged config to calculate mode_changed flags
      drm/i915: Unify modeset and flip paths of intel_crtc_set_config()
      drm/i915: Simplify intel_set_config_compute_mode_changes() a bit
      drm/i915: Stage new modeset state straight into atomic state
      drm/i915: Remove save/restore logic from intel_crtc_set_config()
      drm/i915: Update crtc state active flag based on DPMS
      drm/atomic: Make mode_fixup() optional for check_modeset()
      drm/i915: Use atomic helpers for computing changed flags
      drm/i915: Take ownership of atomic state on success in intel_set_mode()
      drm/i915: Preserve shared DPLL information in new pipe_config
      drm/i915: Don't use plane update helper in legacy mode set
      drm/i915: Swap atomic state in legacy modeset
      drm/i915: Get rid of intel_crtc_set_state()

Chandra Konduru (2):
      drm/i915: skylake primary plane scaling using shared scalers
      drm/i915: skylake sprite plane scaling using shared scalers

Chris Wilson (3):
      drm/i915: Add RPS thresholds to debugfs/i915_frequency_info
      drm/i915: Remove incorrect restriction on 32bit offsets in ppGTT backend
      drm/i915: Remove locking for get-caching query

Damien Lespiau (7):
      drm/i915/skl: Add the INIT power domain to the MISC I/O power well
      drm/i915/skl: Fix the CTRL typo in the DPLL_CRTL1 defines
      drm/i915: Re-order the PCU opcodes
      drm/i915: Merge the GEN9 memory latency PCU opcode with its friends
      drm/i915/skl: Make the Misc I/O power well part of the PLLS domain
      drm/i915/skl: Fix WaDisableChickenBitTSGBarrierAckForFFSliceCS
      drm/i915/skl: Re-indent part of skl_ddi_calculate_wrpll()

Dan Carpenter (1):
      drm/i915: checking IS_ERR() instead of NULL

Daniel Vetter (4):
      drm/i915: Simplify cmd-parser DISPATCH_SECURE check
      drm/i915/skl: Add support to load SKL CSR firmware.
      drm/edid: Kerneldoc for newly added edid_corrupt
      drm/i915: Update DRIVER_DATE to 20150508

Deepak S (1):
      drm/i915: Setup static bias for GPU

Fabian Frederick (1):
      drm/i915: use ERR_CAST instead of ERR_PTR/PTR_ERR

Jani Nikula (2):
      drm/i915: make drm_crtc_helper_funcs const data
      drm/i915/audio: do not mess with audio registers if port is invalid

Jesse Barnes (1):
      drm/i915/vlv: remove wait for previous GFX clk disable request

Joonas Lahtinen (6):
      drm/i915: Do not clear mappings beyond VMA size
      drm/i915: Do not make assumptions on GGTT VMA sizes
      drm/i915: Consider object pinned if any VMA is pinned
      drm/i915: Add a partial GGTT view type
      drm/i915: Use partial view in mmap fault handler
      drm/i915: Reject huge tiled objects

Maarten Lankhorst (7):
      drm/i915: Remove implicitly disabling primary plane for now
      drm/i915: Add a way to disable planes without updating state
      drm/i915: Use the disable callback for disabling planes.
      drm/i915: get rid of primary_enabled and use atomic state
      drm/i915: Move intel_(pre_disable/post_enable)_primary to intel_display.c, and use it there.
      drm/i915: Rename intel_crtc_dpms_overlay.
      drm/i915: Move toggling planes out of crtc enable/disable.

Matt Roper (1):
      drm/i915: Set crtc_state->active to false when CRTC is disabled (v2)

Michel Thierry (1):
      drm/i915: Fix 32b overflow check in gen8_ppgtt_alloc_page_directories

Mika Kahola (2):
      drm/i915: eDP link training optimization
      drm/i915: DP link training optimization

Mika Kuoppala (2):
      drm/i915: Clear vma->bound on unbinding
      drm/i915: Free wa_batchbuffer when freeing error state

Nick Hoath (12):
      drm/i915/bxt: Add WaDisableThreadStallDopClockGating
      drm/i915/bxt: Add WaDisableSbeCacheDispatchPortSharing
      drm/i915/bxt: Add WaForceContextSaveRestoreNonCoherent
      drm/i915/bxt: Mark WaDisablePartialInstShootdown as for Broxton also.
      drm/i915/bxt: Mark workaround as for Skylake & Broxton
      drm/i915/bxt: Enable WaDisableDgMirrorFixInHalfSliceChicken5 for Broxton
      drm/i915/bxt: Enable WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken for Broxton
      drm/i915/bxt: Enable WaEnableYV12BugFixInHalfSliceChicken7 for Broxton
      drm/i915/bxt: Move WaForceEnableNonCoherent to Skylake only
      drm/i915/bxt: Mark Wa4x4STCOptimizationDisable as for Broxton also.
      drm/i915/bxt: Mark WaDisablePartialResolveInVc as for Broxton also.
      drm/i915/bxt: Mark WaCcsTlbPrefetchDisable as for Broxton also.

Rebecca N. Palmer (1):
      drm/i915: Fix possible security hole in command parsing

Sonika Jindal (2):
      drm/i915/skl: Add module parameter to select edp vswing table
      drm/i915: Rename dp rates array as per platform

Suketu Shah (5):
      drm/i915/skl: Add DC5 Trigger Sequence
      drm/i915/skl: Assert the requirements to enter or exit DC5.
      drm/i915/skl: Add DC6 Trigger sequence.
      drm/i915/skl: Assert the requirements to enter or exit DC6.
      drm/i915/skl: Enable runtime PM

Todd Previte (4):
      drm/i915: Move Displayport test request and sink IRQ logic to intel_dp_detect()
      drm: Add edid_corrupt flag for Displayport Link CTS
      drm/i915: Implement the intel_dp_autotest_edid function for DP EDID complaince tests
      drm/i915: Add debugfs test control files for Displayport compliance testing

Vandana Kannan (1):
      drm/i915/bxt: BLC implementation

Ville Syrjälä (7):
      drm/i915: Use POSTING_READ() in intel_sdvo_write_sdvox()
      drm/i915: s/9/intel_freq_opcode(450)/
      drm/i915: Add missing POSTING_READ()s to BXT dbuf enable sequence
      drm/i915: Implement chv display PHY lane stagger setup
      drm/i915: Work around DISPLAY_PHY_CONTROL register corruption on CHV
      Revert "drm/i915: Hack to tie both common lanes together on chv"
      drm/i915: Only wait for required lanes in vlv_wait_port_ready()

 drivers/gpu/drm/drm_atomic_helper.c        |    5 +
 drivers/gpu/drm/drm_edid.c                 |   32 +-
 drivers/gpu/drm/drm_edid_load.c            |    7 +-
 drivers/gpu/drm/i915/Makefile              |    3 +-
 drivers/gpu/drm/i915/i915_debugfs.c        |  240 +++-
 drivers/gpu/drm/i915/i915_dma.c            |   11 +-
 drivers/gpu/drm/i915/i915_drv.c            |   64 +-
 drivers/gpu/drm/i915/i915_drv.h            |   42 +-
 drivers/gpu/drm/i915/i915_gem.c            |  174 ++-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   32 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c        |   87 +-
 drivers/gpu/drm/i915/i915_gem_gtt.h        |   20 +-
 drivers/gpu/drm/i915/i915_gpu_error.c      |    1 +
 drivers/gpu/drm/i915/i915_params.c         |    8 +
 drivers/gpu/drm/i915/i915_reg.h            |   89 +-
 drivers/gpu/drm/i915/intel_atomic.c        |   13 +-
 drivers/gpu/drm/i915/intel_atomic_plane.c  |   20 +-
 drivers/gpu/drm/i915/intel_audio.c         |   20 +-
 drivers/gpu/drm/i915/intel_bios.c          |    9 +-
 drivers/gpu/drm/i915/intel_csr.c           |  414 +++++++
 drivers/gpu/drm/i915/intel_ddi.c           |  101 +-
 drivers/gpu/drm/i915/intel_display.c       | 1774 +++++++++++++---------------
 drivers/gpu/drm/i915/intel_dp.c            |  151 ++-
 drivers/gpu/drm/i915/intel_dp_mst.c        |   13 +-
 drivers/gpu/drm/i915/intel_drv.h           |   46 +-
 drivers/gpu/drm/i915/intel_fbc.c           |    2 +-
 drivers/gpu/drm/i915/intel_hdmi.c          |   46 +-
 drivers/gpu/drm/i915/intel_lrc.c           |    7 +-
 drivers/gpu/drm/i915/intel_panel.c         |   87 +-
 drivers/gpu/drm/i915/intel_pm.c            |   19 +-
 drivers/gpu/drm/i915/intel_ringbuffer.c    |   67 +-
 drivers/gpu/drm/i915/intel_runtime_pm.c    |  251 +++-
 drivers/gpu/drm/i915/intel_sdvo.c          |    6 +-
 drivers/gpu/drm/i915/intel_sprite.c        |  262 ++--
 include/drm/drm_crtc.h                     |    9 +-
 35 files changed, 2664 insertions(+), 1468 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_csr.c

Daniel Vetter
Software Engineer, Intel Corporation

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