[PATCH 1/3] drm/radeon: Disable uncacheable CPU mappings of GTT with RV6xx

[Christian König]

On 05.11.2015 09:25, Michel Dänzer wrote:
> From: Michel Dänzer <michel.daenzer at amd.com>
>
> They reportedly cause random GPU hangs.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91268
>
> Cc: stable at vger.kernel.org
> Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>

For this series Reviewed-by: Christian König <christian.koenig at amd.com>

> ---
>   drivers/gpu/drm/radeon/radeon_object.c | 6 ++++++
>   1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
> index d302488..a35f5af 100644
> --- a/drivers/gpu/drm/radeon/radeon_object.c
> +++ b/drivers/gpu/drm/radeon/radeon_object.c
> @@ -221,6 +221,12 @@ int radeon_bo_create(struct radeon_device *rdev,
>   	if (!(rdev->flags & RADEON_IS_PCIE))
>   		bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC);
>   
> +	/* Write-combined CPU mappings of GTT cause GPU hangs with RV6xx
> +	 * See https://bugs.freedesktop.org/show_bug.cgi?id=91268
> +	 */
> +	if (rdev->family >= CHIP_RV610 && rdev->family <= CHIP_RV635)
> +		bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC);
> +
>   #ifdef CONFIG_X86_32
>   	/* XXX: Write-combined CPU mappings of GTT seem broken on 32-bit
>   	 * See https://bugs.freedesktop.org/show_bug.cgi?id=84627