[PATCH i915 v3 1/2] i915: wait for fences in mmio_flip()

Chris Wilson chris at chris-wilson.co.uk
Fri Nov 13 02:08:11 PST 2015


On Thu, Nov 12, 2015 at 05:49:28PM -0800, Alex Goins wrote:
> If a buffer is backed by dmabuf, wait on its reservation object's fences
> before flipping.
> 
> Signed-off-by: Alex Goins <agoins at nvidia.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index b2270d5..acec108a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -44,6 +44,8 @@
>  #include <drm/drm_plane_helper.h>
>  #include <drm/drm_rect.h>
>  #include <linux/dma_remapping.h>
> +#include <linux/reservation.h>
> +#include <linux/dma-buf.h>
>  
>  /* Primary plane formats for gen <= 3 */
>  static const uint32_t i8xx_primary_formats[] = {
> @@ -11170,10 +11172,19 @@ static void ilk_do_mmio_flip(struct intel_crtc *intel_crtc)
>  static void intel_do_mmio_flip(struct intel_crtc *intel_crtc)
>  {
>  	struct drm_device *dev = intel_crtc->base.dev;
> +	struct drm_i915_gem_object *pending_flip_obj =
> +		intel_crtc->unpin_work->pending_flip_obj;
>  	u32 start_vbl_count;
>  
>  	intel_mark_page_flip_active(intel_crtc);
>  
> +	/* For framebuffer backed by dmabuf, wait for fence */
> +	if (pending_flip_obj->base.dma_buf) {
> +		reservation_object_wait_timeout_rcu(
> +			pending_flip_obj->base.dma_buf->resv,
> +			true, false, msecs_to_jiffies(96));
> +	}

This wait should be prior to marking the flip as waiting for the
flip-completion interrupt. My personal preference (aside from putting
this next to the other wait) would to have been to use crtc->primary->fb
to match the do_mmip_flips funcs (I expect that we will eliminate the
pending_flip_obj in the near future).

Also we are missing the addition of
if (obj->base.dma_buf && obj->base.dma_buf->resv->fence_excl)
  return true;
to use_mmio_flip().
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre


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