[RFC PATCH 1/2] drm: add support for for clk and de polarity
Tomi Valkeinen
tomi.valkeinen at ti.com
Thu Nov 26 23:37:50 PST 2015
On 26/11/15 16:20, Manfred Schlaegl wrote:
> On 2015-11-25 18:22, Philipp Zabel wrote:
>> Am Mittwoch, den 15.07.2015, 17:50 +0200 schrieb Manfred Schlaegl:
>>> To get full support for parallel and LVDS displays with drm:
>>> Add representation for clock and data enable polarity in drm_display_mode
>>> flags (similar to HSYNC/VSYNC polarity) and update conversion functions
>>> from/to videomode accordingly.
>>>
>>> This is especially important for embedded devices where parallel(RGB) and
>>> LVDS displays are still widely used and drm already plays an important
>>> role.
>>>
>>> Tested on Freescale i.MX53(parallel) and i.MX6(LVDS).
>>>
>>> Background:
>>> There was the ability to set polarity of clock and data enable signals
>>> in devicetree(display-timing), struct display_timing and struct videomode,
>>> but there was no representation for this in struct drm_display_mode.
>>> Example on Freescale i.MX53/i.MX6 SoC's:
>>> * A parallel display using different clock polarity is set up using
>>> display-timing in devicetree
>>> * ipuv3 parallel outputs clock with wrong polarity
>>>
>>> Signed-off-by: Manfred Schlaegl <manfred.schlaegl at gmx.at>
>>
>> Any comments on whether data enable and pixel clock polarity flags can
>> be added to the visible DRM_MODE_FLAGs, and if not, where else this
>> information should be kept? struct drm_display_info?
>>
>> This patch and the following IPUv3 patch are useful and necessary for
>> quite some panels connected to i.MX SoCs, but adding DRM_MODE_FLAGs is
>> somewhat out of my jurisdiction.
>>
>> best regards
>> Philipp
>>
>
> Good to see that this discussion is triggered.
I seem to have missed this one. This is important for omapdrm also.
We've had similar patch in TI's linux for a while, but I have never had
time to start upstreaming it.
Two comments:
The "pixclock polarity" could be explained a bit, as it's not really
about polarity. This was discussed when the display-timings stuff was
worked on, and display-timings.txt explains what the "pixelclk-active"
property means.
So here I think you could maybe have a comment pointing to
display-timings.txt, or perhaps a short comment about what the flag is.
Or if you come up with a great name for the define, that's good too =).
The other comment is not about this patch as such, but similar flags
that OMAP has, and possibly some other platforms too:
1) sync signals driven on rising or falling edge of pixel clock
2) hsync and vsync happen at the same time or hsync happens first,
followed by vsync
Any other platforms have similar features?
Tomi
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 819 bytes
Desc: OpenPGP digital signature
URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20151127/09b2ce1c/attachment.sig>
More information about the dri-devel
mailing list