[PATCH 0/9] drm/exynos: update codes related with gem

[Daniel Vetter]

On Wed, Oct 14, 2015 at 09:33:32AM +0900, Joonyoung Shim wrote:
> On 10/13/2015 09:29 PM, Daniel Vetter wrote:
> > On Tue, Oct 13, 2015 at 06:32:53PM +0900, Joonyoung Shim wrote:
> >> On 10/13/2015 05:37 PM, Joonyoung Shim wrote:
> >>> On 10/13/2015 05:27 PM, Daniel Vetter wrote:
> >>>> On Tue, Oct 13, 2015 at 04:00:45PM +0900, Joonyoung Shim wrote:
> >>>>> Hi,
> >>>>>
> >>>>> This patchset is about gem codes update of exynos-drm.
> >>>>>
> >>>>> The first and second patches are cleanup to remove useless codes.
> >>>>> The rest is to support cachable gem allocation.
> >>>>>
> >>>>> The exynos-drm uses DMA mapping API to allocate/mmap buffer of gem. If
> >>>>> it is cachable, does it with DMA_ATTR_NON_CONSISTENT attribute, but
> >>>>> DMA_ATTR_NON_CONSISTENT isn't supported in DMA mapping API of ARM, so it
> >>>>> doesn't give any effects.
> >>>>>
> >>>>> This patchset introduces new buffer allocation to use
> >>>>> drm_gem_get/put_pages() instead of DMA mapping API. It will be used
> >>>>> for the rest except allocation of physically continuous buffer on
> >>>>> non-iommu, then exynos-drm can support cachable buffer of gem. Also it
> >>>>> can support physically non-continuous buffer on non-iommu.
> >>>>>
> >>>>> EXYNOS_BO_CONTIG flag on iommu is ambiguous because it doesn't care
> >>>>> whether buffer is continuous physically if iommu is supported. This
> >>>>> patchset always will use EXYNOS_BO_CONTIG flag on iommu and then can
> >>>>> mean that the buffer is continuous for device.
> >>>>>
> >>>>> There is no user API to control cache coherence for the cpu and device
> >>>>> about cachable buffer. This patchset introduces two ioctls for cpu
> >>>>> access of gem object from user. It will be synced properly in order for
> >>>>> the cpu and device if buffer of gem object is cachable.
> >>>>
> >>>> Out of curiosity, where's the userspace part for this work? Usually kernel
> >>>> abi extensions come with a link to the relevant branch for easier review.
> >>>> -Daniel
> >>>>
> >>>
> >>> Right, thanks for point.
> >>>
> >>> I just modified a little bit exynos_fimg2d_test and exynos parts of
> >>> libdrm to test them as workaround. I will expose it.
> >>>
> >>
> >> Please refer follows.
> >> https://github.com/dofmind/libdrm/commits/exynos
> >>
> >> If fimd2d test program uses cachable gem, it will show cache coherency
> >> problem, so it adds to use new ioctls to keep cache coherency.
> > 
> > Is there some real userspace too, not just a test/demo app?
> 
> Unfortunately not yet, i hope it can be used on real userspace.

In general we wait with merging new userspace ABI until that's really
ready, since very often there's some corner cases that you just didn't
think about in your toy demo compared to the real thing. Like how to
manage buffer caches/reuse for apps that essentially run forever (like X
server or a compositor).
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch