[PATCH] drm/radeon/dce4+: optimize pageflip

[Michel Dänzer]

On 24.10.2015 01:57, Alex Deucher wrote:
> Taking the grph update lock is only necessary when
> updating the the secondary address (for single pipe stereo).
> 
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> ---
>  drivers/gpu/drm/radeon/evergreen.c | 31 ++++---------------------------
>  1 file changed, 4 insertions(+), 27 deletions(-)
> 
> diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
> index 0acde19..511b8d6 100644
> --- a/drivers/gpu/drm/radeon/evergreen.c
> +++ b/drivers/gpu/drm/radeon/evergreen.c
> @@ -1405,43 +1405,20 @@ void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc)
>   * @crtc_base: new address of the crtc (GPU MC address)
>   *
>   * Does the actual pageflip (evergreen+).
> - * During vblank we take the crtc lock and wait for the update_pending
> - * bit to go high, when it does, we release the lock, and allow the
> - * double buffered update to take place.
> - * Returns the current update pending status.
> + * Triggers the actual pageflip by updating the primary
> + * surface base address.

The new comment lines could be combined with the "Does the actual
pageflip" line above. Either way,

Reviewed-by: Michel Dänzer <michel.daenzer at amd.com>


-- 
Earthling Michel Dänzer               |               http://www.amd.com
Libre software enthusiast             |             Mesa and X developer