[PATCH] drm: Loongson-3 doesn't fully support wc memory

[Alex Deucher]

On Tue, Apr 19, 2016 at 7:19 AM, Huacai Chen <chenhc at lemote.com> wrote:
> Signed-off-by: Huacai Chen <chenhc at lemote.com>

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  include/drm/drm_cache.h | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/include/drm/drm_cache.h b/include/drm/drm_cache.h
> index 461a055..cebecff 100644
> --- a/include/drm/drm_cache.h
> +++ b/include/drm/drm_cache.h
> @@ -39,6 +39,8 @@ static inline bool drm_arch_can_wc_memory(void)
>  {
>  #if defined(CONFIG_PPC) && !defined(CONFIG_NOT_COHERENT_CACHE)
>         return false;
> +#elif defined(CONFIG_MIPS) && defined(CONFIG_CPU_LOONGSON3)
> +       return false;
>  #else
>         return true;
>  #endif
> --
> 2.7.0
>
>
>
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