[PATCH 08/10] drm/etnaviv: make it possible to reconfigure perf counter

Christian Gmeiner christian.gmeiner at gmail.com
Fri Dec 9 17:56:54 UTC 2016


Hi Wladimir,

2016-12-09 16:48 GMT+01:00 Wladimir J. van der Laan <laanwj at gmail.com>:
> On Fri, Dec 09, 2016 at 12:21:29PM +0100, Christian Gmeiner wrote:
>> --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
>> +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
>> @@ -1379,6 +1379,9 @@ static void etnaviv_process_readbacks(struct etnaviv_gpu *gpu,
>>               const u32 val = gpu_read(gpu, readback->reg);
>>               u32 *bo = readback->bo_vma;
>>
>> +             if (readback->flags & ETNA_READBACK_PERF)
>> +                     gpu_write(gpu, readback->perf_reg, readback->perf_value);
>> +
>>               *(bo + readback->offset) = val;
>>       }
>>  }
>
> This is the wrong order. First write the selection register, then read the
> counter. Currently this causes the reported registers to be off by one,
> if they're read in sequential order.
>

Good catch .. will be fixed in v2.

thanks
--
Christian Gmeiner, MSc

https://soundcloud.com/christian-gmeiner


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