[PATCH] i915: Fix an overflow in __i915_wait_request

Daniel Vetter daniel at ffwll.ch
Wed Feb 17 15:55:30 UTC 2016


On Wed, Feb 17, 2016 at 02:20:35PM +0000, Alan wrote:
> The timeout is 64bit but the maths against it is done 32bit wrapped. Force
> 64bit.

Where does this wrap? Iirc the lowest HZ we have is 100, and that should
still comfortably fit into 32 bits. I assume this is due to some
overenthusiastic static checker. If so ok if I adjust the commit message
to make it clear it never wrapped, and we only shut up a real tool here?

Thanks, Daniel

> 
> Signed-off-by: Alan Cox <alan at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem.c |    4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index de57e7f..dc81045 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1358,9 +1358,9 @@ out:
>  		 * bit of mismatch in the jiffies<->nsecs<->ktime loop. So patch
>  		 * things up to make the test happy. We allow up to 1 jiffy.
>  		 *
> -		 * This is a regrssion from the timespec->ktime conversion.
> +		 * This is a regression from the timespec->ktime conversion.
>  		 */
> -		if (ret == -ETIME && *timeout < jiffies_to_usecs(1)*1000)
> +		if (ret == -ETIME && *timeout < jiffies_to_usecs(1)*1000ULL)
>  			*timeout = 0;
>  	}
>  
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch


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