[PATCH 2/4] Add adreno430 power control

[Emil Velikov]

On 19 February 2016 at 00:50, C Stout <cstout at chromium.org> wrote:
> Change-Id: Ife53627e9985e1204cc319da0221338e5272eb81
> ---
>  drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 39 +++++++++++++++++++++++++++++++++--
>  1 file changed, 37 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
> index 9a1ffec..9aab904 100644
> --- a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
> @@ -552,12 +552,47 @@ static void a4xx_dump(struct msm_gpu *gpu)
>         adreno_dump(gpu);
>  }
>
> +static int a4xx_pm_resume(struct msm_gpu *gpu) {
> +       struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
> +       int ret;
> +
> +       ret = msm_gpu_pm_resume(gpu);
> +       if (ret)
> +               return ret;
> +
> +       if (adreno_is_a430(adreno_gpu)) {
> +               unsigned int reg;
> +               /* Set the default register values; set SW_COLLAPSE to 0 */
> +               gpu_write(gpu, REG_A4XX_RBBM_POWER_CNTL_IP, 0x778000);
> +               do {
> +                       udelay(5);
> +                       reg = gpu_read(gpu, REG_A4XX_RBBM_POWER_STATUS);
> +               } while (!(reg & SP_TP_PWR_ON));
> +       }
Imho wrapping things the opposite way -> include the 430 specifics in
msm_gpu_pm_resume/suspend. If needed.

Hmm is it me or the above register definitions are missing in
linux/master and linux/next ? What did you use as a base for the
series ?

Regards,
Emil