[PATCH 6/6] drm/msm/dsi: Parse DSI lanes via DT

[Archit Taneja]

On 02/24/2016 01:34 AM, Rob Herring wrote:
> On Tue, Feb 23, 2016 at 01:11:24PM +0200, Tomi Valkeinen wrote:
>>
>>
>> On 23/02/16 12:43, Archit Taneja wrote:
>>>
>>>
>>> On 02/23/2016 02:48 PM, Tomi Valkeinen wrote:
>>>>
>>>> On 22/02/16 22:10, Rob Herring wrote:
>>>>
>>>>>> If we want all DSI host controllers to use a common binding to describe
>>>>>> lanes, we'd need to go with the most flexible one, and the driver
>>>>>> restricts it to the subsets that we support.
>>>>
>>>> True, but I wonder if that's necessary. The lane property for the SoC
>>>> should be read by the SoC specific driver, right? So the DT property can
>>>> be anything. I'm not sure if there's ever a reason for a generic code to
>>>> observe the DSI lane setup.
>>>
>>> Yeah, it is very SoC specific.
>
> Agreed.

Okay. We probably don't need to go with a generic binding, then. I'll
simplify the msm/dsi lane bindings (i.e, drop the clock lanes, and
represent things in lanes instead of pins).

Thanks,
Archit

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