radeon framebuffer tiling

[Alex Deucher]

On Mon, Jan 4, 2016 at 12:57 PM, Jay Cornwall <jay at jcornwall.me> wrote:
> Hi,
>
> dce4_crtc_do_set_base is the only location in which EVERGREEN_GRPH_CONTROL
> is updated. This currently configures a non-tiled framebuffer on my SI
> system.
>
> This design prevents drmModePageFlip from handling a framebuffer with a
> different tiling configuration.
>
> Is this the intended architecture? i.e. All surfaces provided to
> drmModePageFlip should match the initial framebuffer layout, or should
> EVERGREEN_GRPH_CONTROL be updated on every page flip?

Pageflipping is only available between surfaces of the same format
(i.e., we only update the base address, not the other parameters).

Alex