[PATCH 0/2] drm/i915/skl: Fix (most) pipe underruns, properly this time

Lyude cpaul at redhat.com
Tue Jul 19 16:30:54 UTC 2016


Unfortunately as a few of you are aware, Skylake is still very prone to pipe
underruns. Most of this comes from not doing things atomically enough (e.g.
needing to ensure that we update watermarks with other plane attributes, not
forcefully flushing pipes until we need to, etc.). Now that I've finally got a
grasp on how double buffered registers, arming registers, etc. works on skl,
I've written up patches that fix most of the pipe underruns on Skylake.

When I say "most", I'm referring to the fact that I still seem to be able to
reproduce pipe underruns, but this seems to be strictly exclusive to when pipes
are being disabled. This means things *still* need to be made more atomic
(sigh), but at least this is a start.

Testing this series with a chamelium[1], mainly so I could heavily stress test
the hotplugging of displays, I'm no longer able to reproduce pipe underruns
when enabling another pipe. I've also tried reproducing underruns using xdotool
to move the cursor in X from one monitor to another as quickly as possible
(e.g. > 60 fps), and am no longer able to reproduce underruns there either with
this patch series.

Signed-off-by: Lyude Paul <cpaul at redhat.com>
Cc: stable at vger.kernel.org
Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
Cc: Daniel Vetter <daniel.vetter at intel.com>
Cc: Radhakrishna Sripada <radhakrishna.sripada at intel.com>
Cc: Hans de Goede <hdegoede at redhat.com> <cpaul at redhat.com>
Cc: Matt Roper <matthew.d.roper at intel.com>

[1]: https://www.chromium.org/chromium-os/testing/chamelium

Lyude (2):
  drm/i915/skl: Update plane watermarks atomically during plane updates
  drm/i915/skl: Don't mark pipes as dirty unless we've added/removed
    pipes

 drivers/gpu/drm/i915/intel_display.c | 47 ++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_pm.c      | 31 +++++++++---------------
 2 files changed, 59 insertions(+), 19 deletions(-)

-- 
2.7.4



More information about the dri-devel mailing list