[PATCH v4 09/11] drm/i915: Check pixel rate for DP to VGA dongle
Ville Syrjälä
ville.syrjala at linux.intel.com
Thu Jun 9 08:14:08 UTC 2016
On Mon, Jun 06, 2016 at 04:29:11PM +0300, Mika Kahola wrote:
> Filter out a mode that exceeds the max pixel rate setting
> for DP to VGA dongle. This is defined in DPCD register 0x81
> if detailed cap info i.e. info field is 4 bytes long and
> it is available for DP downstream port.
>
> The register defines the pixel rate divided by 8 in MP/s.
>
> v2: DPCD read outs and computation moved to drm (Ville, Daniel)
> v3: Sink pixel rate computation moved to drm_dp_max_sink_dotclock()
> function (Daniel)
> v4: Use of drm_dp_helper.c routines to compute max pixel clock (Ville)
>
> Signed-off-by: Mika Kahola <mika.kahola at intel.com>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 096acbf0..1b94347 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -200,6 +200,23 @@ intel_dp_mode_valid(struct drm_connector *connector,
> int target_clock = mode->clock;
> int max_rate, mode_rate, max_lanes, max_link_clock;
> int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
> + bool is_branch_device;
> + int max_dp_clk;
> + int type;
> + uint8_t port_cap[4];
> +
> + is_branch_device = intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] &
> + DP_DWN_STRM_PORT_PRESENT;
> +
> + if (is_branch_device) {
> + drm_dp_downstream_port_cap(&intel_dp->aux, intel_dp->dpcd, port_cap);
I'm pretty sure we already read out the downstream port caps in fact.
Hmm, yeah ->downstream_ports. So no need for this, and I suppose no need
for your helper for the readout either. Just always readoing out the
full 16 bytes should be fine.
> + type = drm_dp_downstream_type(intel_dp->dpcd, port_cap);
> + max_dp_clk = drm_dp_downstream_max_clock(intel_dp->dpcd, port_cap);
> +
> + if ((type == DP_DS_PORT_TYPE_VGA) && (max_dp_clk > 0)) {
Type check can be skipped if drm_dp_downstream_max_clock() just returns
0 for the "don't know" case.
> + max_dotclk = min(max_dotclk, max_dp_clk);
> + }
> + }
>
> if (is_edp(intel_dp) && fixed_mode) {
> if (mode->hdisplay > fixed_mode->hdisplay)
> --
> 1.9.1
--
Ville Syrjälä
Intel OTC
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