[RFC PATCH 11/13] arm64: tegra: Add SOR power-domain node

Thierry Reding thierry.reding at gmail.com
Mon Jun 20 16:37:32 UTC 2016


On Mon, Jun 20, 2016 at 10:18:42AM +0100, Jon Hunter wrote:
> 
> On 17/06/16 17:42, Thierry Reding wrote:
> > * PGP Signed by an unknown key
> > 
> > On Fri, Jun 17, 2016 at 01:03:45PM +0100, Jon Hunter wrote:
> >> Add node for SOR power-domain for Tegra210 and populate the SOR
> >> power-domain phandle for SOR and DPAUX nodes that are dependent
> >> on this power-domain.
> >>
> >> Please note that although neither the SOR or DPAUX drivers currently
> >> support runtime power-management, by populating the power-domain node
> >> the SOR power-domain will be turned on before probing SOR or DPAUX
> >> devices and kept on while the devices are bound.
> >>
> >> Signed-off-by: Jon Hunter <jonathanh at nvidia.com>
> >> ---
> >>  arch/arm64/boot/dts/nvidia/tegra210.dtsi | 18 ++++++++++++++++++
> >>  1 file changed, 18 insertions(+)
> > 
> > I've got patches queued in my drm-tegra tree to add support for runtime
> > PM for the SOR driver. Will that in some way clash with this work if
> > merged in parallel?
> 
> Yes I had seen those. I was wondering if I should include them here but
> opted not too (as it was becoming a massive series). It should be fine
> to enable RPM later, you just need to be aware that the partition could
> turn off on a RPM put so you just need to ensure that any register
> context is saved and restored.

This doesn't matter much for Tegra DRM because we always program the
entire set of registers after pm_runtime_get(), which already resets
the IP block anyway.

> By the way, one item I am not certain about is the relationship between
> the HDMI device and the SOR device. If the HDMI is in the SOR partition
> it should also have the SOR power-domain populated, but it just uses the
> SOR, then the SOR driver should handle this.

On Tegra210 the HDMI output is driven by the SOR, and that's implemented
by the SOR driver, too, so the partition setup should be correct
already.

On Tegra124 and earlier the HDMI output is driven by a separate IP block
that's not at all related to SOR, and I haven't found any evidence that
it would be in the SOR power partition either.

Thierry
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