[PATCH v2] drm: bridge/dw-hdmi: Add support for DWC Phy

Jose Abreu Jose.Abreu at synopsys.com
Tue Jun 28 15:44:12 UTC 2016


This patch adds support for the Synopsys HDMI TX Phy in
bridge dw-hdmi.

The init flow is the same as the Rockchip Phy so we
only need to add one define and one if statement.

Also, the audio infoframe was fixed to sampling frequency
of 44.1k. With this patch this is now corrected. As
I don't know if this is specific to Synopsys Phy we only
set this if Phy type is DWC_HDMI.

Signed-off-by: Jose Abreu <joabreu at synopsys.com>
Cc: Carlos Palminha <palminha at synopsys.com>
Cc: David Airlie <airlied at linux.ie>
Cc: Russell King <rmk+kernel at arm.linux.org.uk>
Cc: Fabio Estevam <fabio.estevam at freescale.com>
Cc: Daniel Vetter <daniel.vetter at ffwll.ch>
Cc: Takashi Iwai <tiwai at suse.de>
Cc: Vladimir Zapolskiy <vladimir_zapolskiy at mentor.com>
Cc: Thierry Reding <treding at nvidia.com>
Cc: dri-devel at lists.freedesktop.org
Cc: linux-kernel at vger.kernel.org
---

Changes v1 -> v2:
- Fixed Audio Infoframe

 drivers/gpu/drm/bridge/dw-hdmi.c | 25 ++++++++++++++++++++++++-
 drivers/gpu/drm/bridge/dw-hdmi.h |  1 +
 include/drm/bridge/dw_hdmi.h     |  1 +
 3 files changed, 26 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/bridge/dw-hdmi.c b/drivers/gpu/drm/bridge/dw-hdmi.c
index c9d9412..2cab188 100644
--- a/drivers/gpu/drm/bridge/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
@@ -215,6 +215,29 @@ static void hdmi_set_cts_n(struct dw_hdmi *hdmi, unsigned int cts,
 	hdmi_writeb(hdmi, (n >> 16) & 0x0f, HDMI_AUD_N3);
 	hdmi_writeb(hdmi, (n >> 8) & 0xff, HDMI_AUD_N2);
 	hdmi_writeb(hdmi, n & 0xff, HDMI_AUD_N1);
+
+	/* Set Frame Composer Audio Sample sampling frequency */
+	if (hdmi->dev_type == DWC_HDMI) {
+		u8 val = 0x0;
+
+		switch (hdmi->sample_rate) {
+		case 320000:
+			val = 0x3;
+			break;
+		case 441000:
+			val = 0x0;
+			break;
+		case 480000:
+			val = 0x2;
+			break;
+		default:
+			dev_err(hdmi->dev, "unsupported sample rate (%d)\n",
+					hdmi->sample_rate);
+			return;
+		}
+
+		hdmi_writeb(hdmi, val, HDMI_FC_AUDSCHNL7);
+	}
 }
 
 static unsigned int hdmi_compute_n(unsigned int freq, unsigned long pixel_clk)
@@ -833,7 +856,7 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, unsigned char prep,
 	dw_hdmi_phy_gen2_txpwron(hdmi, 1);
 	dw_hdmi_phy_gen2_pddq(hdmi, 0);
 
-	if (hdmi->dev_type == RK3288_HDMI)
+	if ((hdmi->dev_type == RK3288_HDMI) || (hdmi->dev_type == DWC_HDMI))
 		dw_hdmi_phy_enable_spare(hdmi, 1);
 
 	/*Wait for PHY PLL lock */
diff --git a/drivers/gpu/drm/bridge/dw-hdmi.h b/drivers/gpu/drm/bridge/dw-hdmi.h
index fc9a560..5f137fd 100644
--- a/drivers/gpu/drm/bridge/dw-hdmi.h
+++ b/drivers/gpu/drm/bridge/dw-hdmi.h
@@ -162,6 +162,7 @@
 #define HDMI_FC_SPDDEVICEINF                    0x1062
 #define HDMI_FC_AUDSCONF                        0x1063
 #define HDMI_FC_AUDSSTAT                        0x1064
+#define HDMI_FC_AUDSCHNL7			0x106E
 #define HDMI_FC_DATACH0FILL                     0x1070
 #define HDMI_FC_DATACH1FILL                     0x1071
 #define HDMI_FC_DATACH2FILL                     0x1072
diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h
index bae79f3..6e4fb2e 100644
--- a/include/drm/bridge/dw_hdmi.h
+++ b/include/drm/bridge/dw_hdmi.h
@@ -25,6 +25,7 @@ enum dw_hdmi_devtype {
 	IMX6Q_HDMI,
 	IMX6DL_HDMI,
 	RK3288_HDMI,
+	DWC_HDMI,
 };
 
 struct dw_hdmi_mpll_config {
-- 
2.1.4



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