EDID/DP color precision fixes on Intel hw for stable

[Ville Syrjälä]

On Mon, Mar 28, 2016 at 01:52:44AM +0200, Mario Kleiner wrote:
> Bugzilla https://bugzilla.kernel.org/show_bug.cgi?id=105331
> 
> received a potential fix that was backported to stable. While that
> patch itself is correct for treating DP video sinks with "unknown
> color depth", it uncovered some lack in our general EDID 1.3
> handling, and in how we treat DP->DVI/VGA, causing the fall back
> of Intel DP to 6 bpc / 18 bpp in cases where it shouldn't fall
> back. That leads to unhappy neuroscience/medical users of Intel gpus
> which need their DP->DVI or DP->VGA display devices to operate at at
> least 8 bpc without dithering.
> 
> The following three patches try to improve our EDID handling and
> Intel DP to try harder to detect the proper bpc to avoid these
> regressions for DP-DVI and DP-VGA. The third patch tries to fix
> FDO bug 105331 without causing general unhappiness of other users.

It would seem simpler to me to move the 18bpp fallback into intel_dp.c
and only do it for native DP sinks/downstream ports. That way we should
avoid the need for any EDID quirks IIUC.

The downstream port caps we should still check I suppose. Later
versions of the spec extend the information for pretty much all port
types. I started to write something similar [1] a while back, and by the
looks of things I was probably basing that on the DP 1.2 spec since 1.3
has even more stuff there. Anyways we should put that logic into the
DP helper so that other drivers migth use it as well.

[1] git://github.com/vsyrjala/linux.git dp_downstream_ports

-- 
Ville Syrjälä
Intel OTC