[bug report] drm/amd/powerplay: implement smu7 hwmgr to manager asics with smu ip version 7.

[Zhu, Rex]

Thanks, Alex.

Patch was Reviewed-by: Rex Zhu <Rex.Zhu at amd.com>


Best Regards
Rex

-----Original Message-----
From: Alex Deucher [mailto:alexdeucher at gmail.com] 
Sent: Friday, October 14, 2016 11:14 PM
To: Dan Carpenter
Cc: Zhu, Rex; Maling list - DRI developers
Subject: Re: [bug report] drm/amd/powerplay: implement smu7 hwmgr to manager asics with smu ip version 7.

On Fri, Oct 14, 2016 at 10:32 AM, Dan Carpenter <dan.carpenter at oracle.com> wrote:
> Hello Rex Zhu,
>
> The patch 599a7e9fe1b6: "drm/amd/powerplay: implement smu7 hwmgr to 
> manager asics with smu ip version 7." from Sep 9, 2016, leads to the 
> following static checker warning:
>
>         drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu7_hwmgr.c:2125 smu7_patch_limits_vddc()
>         warn: passing casted pointer '&tab->vddc' to 'smu7_patch_ppt_v0_with_vdd_leakage()' 16 vs 32.
>
> drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu7_hwmgr.c
>   2119  static int smu7_patch_limits_vddc(struct pp_hwmgr *hwmgr,
>   2120                                       struct phm_clock_and_voltage_limits *tab)
>   2121  {
>   2122          struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
>   2123
>   2124          if (tab) {
>   2125                  smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, (uint32_t *)&tab->vddc,
>   2126                                                          &data->vddc_leakage);
>
> This call corrupts vddci.
>
>   2127                  smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, (uint32_t *)&tab->vddci,
>   2128                                                          &data->vddci_leakage);
>
> But that's fine since we immediately overwrite it here.  But 
> unfortunately this call corrupt tab->vddgfx.

Thanks.  Should be fixed in the attached patch.

Alex

>
>   2129          }
>   2130
>   2131          return 0;
>   2132  }
>
> regards,
> dan carpenter
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