[Bug 172421] radeon: allow to set the TMDS frequency by a special kernel parameter

[bugzilla-daemon at bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=172421

--- Comment #14 from Christian König <deathsimple at vodafone.de> ---
(In reply to Roland Scheidegger from comment #13)
> Personally I've always thought the risk of damaging hardware with any kind
> of overclocking is just about exactly zero as long as you don't increase
> voltage levels

Unfortunately this is exactly what happens here. The clock is generated by a
voltage controlled oscillator and for the desired resolution you need to over
clock it by about 30-40%.

That in turn means you raise the voltage way over the nominal limit.

Those oscillators are designed to handle voltages about 250% over the nominal
level without frying immediately, but that says absolutely nothing about the
aging of the circuit under those conditions.

The PLL we are talking about here clearly isn't designed for that level of
operation and even the closed source driver (which are otherwise rather
friendly to overclocking) don't let the user override this absolute limit.

So this is a clearly NAK from my side.

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