[PATCH 2/2] drm/radeon: Prevent races on pre DCE4 between flip submission and completion.

[Alex Deucher]

On Mon, Sep 19, 2016 at 10:56 PM, Michel Dänzer <michel at daenzer.net> wrote:
> On 17/09/16 09:25 PM, Mario Kleiner wrote:
>> Pre DCE4 hw doesn't have reliable pageflip completion
>> interrupts, so instead polling for flip completion is
>> used from within the vblank irq handler to complete
>> page flips.
>>
>> This causes a race if pageflip ioctl is called close to
>> vblank:
>>
>> 1. pageflip ioctl queues execution of radeon_flip_work_func.
>>
>> 2. vblank irq fires, radeon_crtc_handle_vblank checks for
>>    flip_status == FLIP_SUBMITTED finds none, no-ops.
>>
>> 3. radeon_flip_work_func runs inside vblank, decides to
>>    set flip_status == FLIP_SUBMITTED and programs the
>>    flip into hw.
>>
>> 4. hw executes flip immediately (because in vblank), but
>>    as 2 already happened, the flip completion routine only
>>    emits the flip completion event one refresh later ->
>>    wrong vblank count/timestamp for completion and no
>>    performance gain, as instead of delaying the flip until
>>    next vblank, we now delay the next flip by 1 refresh
>>    while waiting for the delayed flip completion event.
>>
>> Given we often don't gain anything due to this race, but
>> lose precision, prevent the programmed flip from executing
>> in vblank on pre DCE4 asics to avoid this race.
>>
>> On pre-AVIVO hw we can't program the hw for edge-triggered
>> flips, they always execute anywhere in vblank. Therefore delay
>> the actual flip programming until after vblank on pre-AVIVO.
>>
>> Signed-off-by: Mario Kleiner <mario.kleiner.de at gmail.com>
>
> Reviewed-by: Michel Dänzer <michel.daenzer at amd.com>

Applied this series.  Thanks!

Alex

>
>
> P.S. Please send radeon (and amdgpu) driver patches to the amd-gfx
> mailing list (as well).
>
> --
> Earthling Michel Dänzer               |               http://www.amd.com
> Libre software enthusiast             |             Mesa and X developer
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