[PATCH 2/4] drm: zte: move CSC register definitions into a common header
Sean Paul
seanpaul at chromium.org
Tue Apr 4 17:47:57 UTC 2017
On Tue, Mar 21, 2017 at 08:15:54PM +0800, Shawn Guo wrote:
> From: Shawn Guo <shawn.guo at linaro.org>
>
> The CSC (Color Space Conversion) block in VOU is used by not only
> Graphic Layer (plane) but also channel (CRTC) module. Let's move
> its register definitions into a common header, so that CRTC driver can
> include it when needed.
>
Reviewed-by: Sean Paul <seanpaul at chromium.org>
> Signed-off-by: Shawn Guo <shawn.guo at linaro.org>
> ---
> drivers/gpu/drm/zte/zx_common_regs.h | 31 +++++++++++++++++++++++++++++++
> drivers/gpu/drm/zte/zx_plane.c | 1 +
> drivers/gpu/drm/zte/zx_plane_regs.h | 18 ------------------
> 3 files changed, 32 insertions(+), 18 deletions(-)
> create mode 100644 drivers/gpu/drm/zte/zx_common_regs.h
>
> diff --git a/drivers/gpu/drm/zte/zx_common_regs.h b/drivers/gpu/drm/zte/zx_common_regs.h
> new file mode 100644
> index 000000000000..2afd80664c51
> --- /dev/null
> +++ b/drivers/gpu/drm/zte/zx_common_regs.h
> @@ -0,0 +1,31 @@
> +/*
> + * Copyright (C) 2017 Sanechips Technology Co., Ltd.
> + * Copyright 2017 Linaro Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#ifndef __ZX_COMMON_REGS_H__
> +#define __ZX_COMMON_REGS_H__
> +
> +/* CSC registers */
> +#define CSC_CTRL0 0x30
> +#define CSC_COV_MODE_SHIFT 16
> +#define CSC_COV_MODE_MASK (0xffff << CSC_COV_MODE_SHIFT)
> +#define CSC_BT601_IMAGE_RGB2YCBCR 0
> +#define CSC_BT601_IMAGE_YCBCR2RGB 1
> +#define CSC_BT601_VIDEO_RGB2YCBCR 2
> +#define CSC_BT601_VIDEO_YCBCR2RGB 3
> +#define CSC_BT709_IMAGE_RGB2YCBCR 4
> +#define CSC_BT709_IMAGE_YCBCR2RGB 5
> +#define CSC_BT709_VIDEO_RGB2YCBCR 6
> +#define CSC_BT709_VIDEO_YCBCR2RGB 7
> +#define CSC_BT2020_IMAGE_RGB2YCBCR 8
> +#define CSC_BT2020_IMAGE_YCBCR2RGB 9
> +#define CSC_BT2020_VIDEO_RGB2YCBCR 10
> +#define CSC_BT2020_VIDEO_YCBCR2RGB 11
> +#define CSC_WORK_ENABLE BIT(0)
> +
> +#endif /* __ZX_COMMON_REGS_H__ */
> diff --git a/drivers/gpu/drm/zte/zx_plane.c b/drivers/gpu/drm/zte/zx_plane.c
> index d646ac931663..4a6252720c10 100644
> --- a/drivers/gpu/drm/zte/zx_plane.c
> +++ b/drivers/gpu/drm/zte/zx_plane.c
> @@ -16,6 +16,7 @@
> #include <drm/drm_plane_helper.h>
> #include <drm/drmP.h>
>
> +#include "zx_common_regs.h"
> #include "zx_drm_drv.h"
> #include "zx_plane.h"
> #include "zx_plane_regs.h"
> diff --git a/drivers/gpu/drm/zte/zx_plane_regs.h b/drivers/gpu/drm/zte/zx_plane_regs.h
> index 65f271aeabed..9c655f59f9f7 100644
> --- a/drivers/gpu/drm/zte/zx_plane_regs.h
> +++ b/drivers/gpu/drm/zte/zx_plane_regs.h
> @@ -77,24 +77,6 @@
> #define LUMA_STRIDE(x) (((x) << LUMA_STRIDE_SHIFT) & LUMA_STRIDE_MASK)
> #define CHROMA_STRIDE(x) (((x) << CHROMA_STRIDE_SHIFT) & CHROMA_STRIDE_MASK)
>
> -/* CSC registers */
> -#define CSC_CTRL0 0x30
> -#define CSC_COV_MODE_SHIFT 16
> -#define CSC_COV_MODE_MASK (0xffff << CSC_COV_MODE_SHIFT)
> -#define CSC_BT601_IMAGE_RGB2YCBCR 0
> -#define CSC_BT601_IMAGE_YCBCR2RGB 1
> -#define CSC_BT601_VIDEO_RGB2YCBCR 2
> -#define CSC_BT601_VIDEO_YCBCR2RGB 3
> -#define CSC_BT709_IMAGE_RGB2YCBCR 4
> -#define CSC_BT709_IMAGE_YCBCR2RGB 5
> -#define CSC_BT709_VIDEO_RGB2YCBCR 6
> -#define CSC_BT709_VIDEO_YCBCR2RGB 7
> -#define CSC_BT2020_IMAGE_RGB2YCBCR 8
> -#define CSC_BT2020_IMAGE_YCBCR2RGB 9
> -#define CSC_BT2020_VIDEO_RGB2YCBCR 10
> -#define CSC_BT2020_VIDEO_YCBCR2RGB 11
> -#define CSC_WORK_ENABLE BIT(0)
> -
> /* RSZ registers */
> #define RSZ_SRC_CFG 0x00
> #define RSZ_DEST_CFG 0x04
> --
> 1.9.1
--
Sean Paul, Software Engineer, Google / Chromium OS
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