imx-drm: vblank wait timed out

[Christian Gmeiner]

2017-04-05 12:05 GMT+02:00 Philipp Zabel <p.zabel at pengutronix.de>:
> On Tue, 2017-04-04 at 14:50 +0200, Christian Gmeiner wrote:
> [...]
>> > Is this on a non-plus i.MX6? Maybe are missing the LDB DI clock glitch
>> > fixes (commits 5d283b083800, 03d576f202e8, and f13abeff2cde)?
>>
>> Yes it is a non-plus i.MX6D and all those three patches are included in
>> 4.9.20 (which I am using right now), But maybe my dts is not that good as I
>> used it for a longer time without any changes to it. It is really time to get
>> those upstream.
>
> Which device tree is this? Can I see it?
>

sure: https://hastebin.com/ekiyiticac.cpp

>> At the moment I have this artifact in it:
>>
>> &clks {
>>     assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
>>               <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
>>     assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
>>                  <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
>> };
>>
>> I am not to 100% sure if PLL5 is what I want - need.
>
> I'd use PLL5 for LVDS only if there is no other clock that can provide
> the required rate, or if thee is no other display. Is LVDS the only user
> of PLL5 or does this maybe conflict with HDMI?
>

No HDMI - here is clk_summary output: https://hastebin.com/ugesivojep.rb

greets
--
Christian Gmeiner, MSc

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