[PATCH -next] drm/nouveau/secboot/gm20b: fix the error return code in gm20b_secboot_tegra_read_wpr()

Ben Skeggs skeggsb at gmail.com
Thu Apr 27 02:03:58 UTC 2017


On 04/26/2017 12:36 AM, Wei Yongjun wrote:
> From: Wei Yongjun <weiyongjun1 at huawei.com>
>
> The error return code PTR_ERR(mc) is always 0 since mc is
> equal to 0 in this error handling case.
Thank you!  I've merged the patch in my tree.

Ben.

>
> Signed-off-by: Wei Yongjun <weiyongjun1 at huawei.com>
> ---
>  drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
> index b10ed59..30491d1 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c
> @@ -48,7 +48,7 @@ gm20b_secboot_tegra_read_wpr(struct gm200_secboot *gsb, u32 mc_base)
>  	mc = ioremap(mc_base, 0xd00);
>  	if (!mc) {
>  		nvkm_error(&sb->subdev, "Cannot map Tegra MC registers\n");
> -		return PTR_ERR(mc);
> +		return -ENOMEM;
>  	}
>  	sb->wpr_addr = ioread32_native(mc + MC_SECURITY_CARVEOUT2_BOM_0) |
>  	      ((u64)ioread32_native(mc + MC_SECURITY_CARVEOUT2_BOM_HI_0) << 32);
>
>
>
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