[PATCH v2 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered

[Harry Wentland]

On 2017-08-11 02:10 PM, Dhinakaran Pandiyan wrote:
> DPCD 600h - SET_POWER & SET_DP_PWR_VOLTAGE defines power state
> 
> 101 = Set Main-Link for local Sink device and all downstream Sink
> devices to D3 (power-down mode), keep AUX block fully powered, ready to
> reply within a Response Timeout period of 300us.
> 
> This state is useful in a MST dock + MST monitor configuration that
> doesn't wake up from D3 state.
> 
> v2: Use spaces instead of tabs (Jani)
> 
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>

Reviewed-by: Harry Wentland <harry.wentland at amd.com>

Harry

> ---
>  include/drm/drm_dp_helper.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index b17476a..47a6cdb 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -618,6 +618,7 @@
>  # define DP_SET_POWER_D0                    0x1
>  # define DP_SET_POWER_D3                    0x2
>  # define DP_SET_POWER_MASK                  0x3
> +# define DP_SET_POWER_D3_AUX_ON             0x5
>  
>  #define DP_EDP_DPCD_REV			    0x700    /* eDP 1.2 */
>  # define DP_EDP_11			    0x00
>