[Ask for help] i.MX6 dual display

[Sean Nyekjær]

Hi Philipp
>>> I have an i.MX6Q running 4.9 LTS with etnaviv.
>>> We would like to have both the HDMI and LVDS outputs enabled a once.
>>>
>>> If I enable hdmi and lvds in the devicetree, we have only output on the
>>> hdmi port.
>> Probably both LVDS and HDMI are clocked from the video PLL (PLL5). It is
>> rather unlikely to have a combination of LVDS Display and HDMI mode that
>> can be driven from the same PLL frequency, as the LVDS serializer input
>> clock is 3.5 times or 7 times the LVDS pixel clock.
>> You can check the clock tree in /sys/kernel/debug/clk/clk_summary.
>>
>> If you want to support connecting arbitrary monitors at all, you'll have
>> to move the LDB clock input to another PLL that can be set to the LVDS
>> serializer clock rate without disturbing other peripherals.
>> Due to a bug in the i.MX6Q LDB clock dividers, this has to be done once,
>> early during boot, using the assigned-clocks/assigned-clock-parents
>> device tree properties of the &clks node. To find example device trees,
>> see:
>>
>>    git grep -A3 assigned-clocks.*LDB_DI0_SEL arch/arm/boot/dts
>>
> I have this in my devicetree:
> &clks {
>      assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
>             <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
>     assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
>             <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
> };
> That should be enough?
>>> So basically I have 2 questions:
>>> Is it possible to have both LVDS and HDMI enabled at once from the 
>>> same ipu?
>> Yes, if the resolution isn't too high. The IPU pixel clock / bandwidth
>> limitations depend on whether both DIs are active.
>> Also only one of the displays will have overlay plane support, if that
>> is relevant to you, since there's only one DP that can do composition in
>> each IPU.
> Any way to tell if the IPU pixel clock is too high?
> My LVDS display:
> static const struct drm_display_mode xin_sun_xf1011280800_mode = {
>         .clock       = 71100,
>         .hdisplay    = 1280,
>         .hsync_start = 1280 + 40,
>         .hsync_end   = 1280 + 40 + 80,
>         .htotal      = 1280 + 40 + 80 + 40,
>         .vdisplay    = 800,
>         .vsync_start = 800 + 10,
>         .vsync_end   = 800 + 10 + 10,
>         .vtotal      = 800 + 10 + 10 + 3,
>         .vrefresh    = 60,
>         .flags       = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
> }
> HDMI would be fine in 720p mode.
>
>>
>>> Can i move the HDMI output to the other ipu and how?
>> Yes, see arch/arm/boot/dts/imx6q-utilite-pro.dts for an example: After
>> severing the OF graph links between the IPU1 DIs and the HDMI encoder
>> in the device tree, the HDMI output can only be driven by IPU2:
>>
>>    /delete-node/&ipu1_di0_hdmi;
>>    /delete-node/&hdmi_mux_0;
>>    /delete-node/&ipu1_di1_hdmi;
>>    /delete-node/&hdmi_mux_1;
> Thanks if I add this I get LVDS output and a blank HDMI output.
> I have only one fb device. It it possible to get a second one for IPU2?
>
> My prefered option would be the HDMI and LVDS mirrored.
I finally managed to get HDMI and LVDS mirrored.
I added this to my devicetree:
/delete-node/&ipu2_di0_hdmi;
/delete-node/&hdmi_mux_2;
/delete-node/&ipu2_di1_hdmi;
/delete-node/&hdmi_mux_3;
/delete-node/&ipu1_di0_lvds0;
/delete-node/&ipu1_di0_lvds1;
/delete-node/&lvds0_mux_0;
/delete-node/&lvds1_mux_0;
/delete-node/&ipu1_di1_lvds0;
/delete-node/&ipu1_di1_lvds1;
/delete-node/&lvds0_mux_1;
/delete-node/&lvds1_mux_1;

Thanks for your help :-)
/Sean