[PATCH] drm: bridge: dw-hdmi: support i2c extended read mode

[Nickey.Yang]

Hi Jose,


在 2017年02月23日 18:17, Jose Abreu 写道:
> Hi Nickey,
>
>
> On 22-02-2017 11:11, Nickey.Yang wrote:
>> Read EDID func is drm_do_probe_ddc_edid    (in
>> drivers/gpu/drm/drm_edid.c     Line:1215)
>> when block = 3  means &msgs[3].addr = DDC_SEGMENT_ADDR(0x30)
>> ,but in dw_hdmi_i2c_xfer
>> line 299  msgs[i].addr != addr (0x50),  it will printk
>> "unsupported transfer, changed slave address"
>> and return -EOPNOTSUPP.
>>
>> in fact,0x30 not means change slave address but means segment
>> address.
>>
> I am reading the drm_do_probe_ddc_edid and I have one question:
> There are 2 writes and one read, but your patch only handles the
> write of segment address. What about the start address?

write start address operations
{
1235    .addr = DDC_ADDR,
1236    .flags = 0,
1237   .len = 1,
1238    .buf = &start,
}
will be handle by dw_hdmi_i2c_write. it seems we do need to send start 
signal actully,
because in dw_hdmi_i2c_write will do length--    and it will skip
while (length--) {

               /*   */
}


In DesignWare HDMI Transmitter Controller Databook,
2.10   E-DID/HDCP/SCDC I 2 C E-DDC Interface

  /* I 2 C Master Interface Normal Mode */**S   slaveaddr[6:0]   W  A  addr[7:0]   datao[7:0]  A/A PA/A

/* I 2 C Master Interface Extended Read Mode */
S  segaddr[6:0]  W X segpointer[7:0] X Sr slaveaddr[6:0] W A addr[7:0]  A datai[7:0]   A P

so we just need add  handles the write of segment address
to  support I2C Master Interface Extended Read Mode.

> I am refering to this structure:
> 1228                 struct i2c_msg msgs[] = {
> 1229                         {
> 1230                                 .addr   = DDC_SEGMENT_ADDR,
> 1231                                 .flags  = 0,
> 1232                                 .len    = 1,
> 1233                                 .buf    = &segment,
> 1234                         }, {
> 1235                                 .addr   = DDC_ADDR,
> 1236                                 .flags  = 0,
> 1237                                 .len    = 1,
> 1238                                 .buf    = &start,
> 1239                         }, {
> 1240                                 .addr   = DDC_ADDR,
> 1241                                 .flags  = I2C_M_RD,
> 1242                                 .len    = len,
> 1243                                 .buf    = buf,
> 1244                         }
>
> There is a write which indicates DDC segment address and then
> there is another write which indicates start address. Shouldn't
> this be handled?
>
> Best regards,
> Jose Miguel Abreu

Best regards,

Nickey,
>
>

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