[PATCH 00/24] drm/bridge/sii8620: add Ultra HD modes support

[Andrzej Hajda]

Hi Archit,

This quite big patchset adds support for 4K Ultra HD modes in SiI8620 MHL bridge.
To support it full MHL3 protocol and its sub-protocols should be implemented.
Patchset contains also various fixes for bugs discovered during development.

Regards
Andrzej


Andrzej Hajda (24):
  drm/bridge/sii8620: simplify MHL3 mode setting
  drm/bridge/sii8620: add MHL3 mode check helper
  drm/bridge/sii8620: add reading device capability registers
  drm/bridge/sii8620: add continuations to messages
  drm/bridge/sii8620: initial support for eCBUS-S mode
  drm/bridge/mhl: add write burst related definitions
  drm/bridge/sii8620: add support for burst eMSC transmissions
  drm/bridge/sii8620: respond to feature requests
  drm/bridge/sii8620: fix peer device capabilities read code
  drm/bridge/sii8620: remove spare CBUS bring-up sequence
  drm/bridge/sii8620: fix MSC message removal
  drm/bridge/sii8620: fix initialization sequence for MHL2 receivers
  drm/bridge/sii8620: abstract out sink detection code
  drm/bridge/sii8620: set gen2 write burst before sending MSC command
  drm/bridge/sii8620: do not stop MHL output when TMDS input is stopped
  drm/bridge/sii8620: add delay during cbus reset
  drm/bridge/sii8620: split EDID read and write code
  drm/bridge/sii8620: fix disconnect sequence
  drm/bridge/sii8620: rewrite hdmi start sequence
  drm/bridge/sii8620: send EMSC features on request
  drm/bridge/sii8620: improve gen2 write burst IRQ routine
  drm/bridge/sii8620: add HSIC initialization code
  drm/bridge/sii8620: enable MHL3 mode if possible
  drm/bridge/sii8620: enable interlace modes

 drivers/gpu/drm/bridge/sil-sii8620.c | 917 ++++++++++++++++++++++++++++++-----
 drivers/gpu/drm/bridge/sil-sii8620.h |  50 +-
 include/drm/bridge/mhl.h             |  51 ++
 3 files changed, 868 insertions(+), 150 deletions(-)

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2.7.4