[PATCH 19/24] drm/bridge/sii8620: rewrite hdmi start sequence
Archit Taneja
architt at codeaurora.org
Tue Jan 24 08:09:01 UTC 2017
On 01/23/2017 04:42 PM, Andrzej Hajda wrote:
> On 23.01.2017 10:17, Archit Taneja wrote:
>>
>> On 01/20/2017 01:08 PM, Andrzej Hajda wrote:
>>> MHL3 protocol requires registry adjustments depending on chosen video mode.
>>> Necessary information is gathered in mode_fixup callback. In case of HDMI
>>> video modes driver should also send special AVI and MHL infoframes.
>>>
>>> Signed-off-by: Andrzej Hajda <a.hajda at samsung.com>
>>> ---
>>> drivers/gpu/drm/bridge/sil-sii8620.c | 249 +++++++++++++++++++++++++++++++----
>>> drivers/gpu/drm/bridge/sil-sii8620.h | 15 ++-
>>> 2 files changed, 231 insertions(+), 33 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/gpu/drm/bridge/sil-sii8620.c
>>> index 1c76905..2c7b5b9 100644
>>> --- a/drivers/gpu/drm/bridge/sil-sii8620.c
>>> +++ b/drivers/gpu/drm/bridge/sil-sii8620.c
>>> @@ -32,6 +32,8 @@
>>>
>>> #define SII8620_BURST_BUF_LEN 288
>>> #define VAL_RX_HDMI_CTRL2_DEFVAL VAL_RX_HDMI_CTRL2_IDLE_CNT(3)
>>> +#define MHL1_MAX_LCLK 225000
>>> +#define MHL3_MAX_LCLK 600000
>>>
>>> enum sii8620_mode {
>>> CM_DISCONNECTED,
>>> @@ -62,6 +64,9 @@ struct sii8620 {
>>> struct regulator_bulk_data supplies[2];
>>> struct mutex lock; /* context lock, protects fields below */
>>> int error;
>>> + int pixel_clock;
>>> + unsigned int use_packed_pixel:1;
>>> + int video_code;
>>> enum sii8620_mode mode;
>>> enum sii8620_sink_type sink_type;
>>> u8 cbus_status;
>>> @@ -69,7 +74,7 @@ struct sii8620 {
>>> u8 xstat[MHL_XDS_SIZE];
>>> u8 devcap[MHL_DCAP_SIZE];
>>> u8 xdevcap[MHL_XDC_SIZE];
>>> - u8 avif[19];
>>> + u8 avif[HDMI_INFOFRAME_SIZE(AVI)];
>>> struct edid *edid;
>>> unsigned int gen2_write_burst:1;
>>> enum sii8620_mt_state mt_state;
>>> @@ -685,6 +690,40 @@ static void sii8620_burst_tx_rbuf_info(struct sii8620 *ctx, int size)
>>> d->size = cpu_to_le16(size);
>>> }
>>>
>>> +static u8 sii8620_checksum(void *ptr, int size)
>>> +{
>>> + u8 *d = ptr, sum = 0;
>>> +
>>> + while (size--)
>>> + sum += *d++;
>>> +
>>> + return sum;
>>> +}
>>> +
>>> +static void sii8620_mhl_burst_hdr_set(struct mhl3_burst_header *h,
>>> + enum mhl_burst_id id)
>>> +{
>>> + h->id = cpu_to_be16(id);
>>> + h->total_entries = 1;
>>> + h->sequence_index = 1;
>>> +}
>>> +
>>> +static void sii8620_burst_tx_bits_per_pixel_fmt(struct sii8620 *ctx, u8 fmt)
>>> +{
>>> + struct mhl_burst_bits_per_pixel_fmt *d;
>>> + const int size = sizeof(*d) + sizeof(d->desc[0]);
>>> +
>>> + d = sii8620_burst_get_tx_buf(ctx, size);
>>> + if (!d)
>>> + return;
>>> +
>>> + sii8620_mhl_burst_hdr_set(&d->hdr, MHL_BURST_ID_BITS_PER_PIXEL_FMT);
>>> + d->num_entries = 1;
>>> + d->desc[0].stream_id = 0;
>>> + d->desc[0].pixel_format = fmt;
>>> + d->hdr.checksum -= sii8620_checksum(d, size);
>>> +}
>>> +
>>> static void sii8620_burst_rx_all(struct sii8620 *ctx)
>>> {
>>> u8 *d = ctx->burst.rx_buf;
>>> @@ -949,32 +988,162 @@ static void sii8620_stop_video(struct sii8620 *ctx)
>>> sii8620_write(ctx, REG_TPI_SC, val);
>>> }
>>>
>>> +static void sii8620_set_format(struct sii8620 *ctx)
>>> +{
>>> + u8 out_fmt;
>>> +
>>> + if (sii8620_is_mhl3(ctx)) {
>>> + sii8620_setbits(ctx, REG_M3_P0CTRL,
>>> + BIT_M3_P0CTRL_MHL3_P0_PIXEL_MODE_PACKED,
>>> + ctx->use_packed_pixel ? ~0 : 0);
>>> + } else {
>>> + if (ctx->use_packed_pixel)
>>> + sii8620_write_seq_static(ctx,
>>> + REG_VID_MODE, BIT_VID_MODE_M1080P,
>>> + REG_MHL_TOP_CTL, BIT_MHL_TOP_CTL_MHL_PP_SEL | 1,
>>> + REG_MHLTX_CTL6, 0x60
>>> + );
>>> + else
>>> + sii8620_write_seq_static(ctx,
>>> + REG_VID_MODE, 0,
>>> + REG_MHL_TOP_CTL, 1,
>>> + REG_MHLTX_CTL6, 0xa0
>>> + );
>>> + }
>>> +
>>> + if (ctx->use_packed_pixel)
>>> + out_fmt = VAL_TPI_FORMAT(YCBCR422, FULL) |
>>> + BIT_TPI_OUTPUT_CSCMODE709;
>>> + else
>>> + out_fmt = VAL_TPI_FORMAT(RGB, FULL);
>>> +
>>> + sii8620_write_seq(ctx,
>>> + REG_TPI_INPUT, VAL_TPI_FORMAT(RGB, FULL),
>>> + REG_TPI_OUTPUT, out_fmt,
>>> + );
>>> +}
>>> +
>>> +#define MHL3_VSIF_TYPE 0x81
>>> +#define MHL3_VSIF_VERSION 0x03
>>> +#define MHL3_VSIF_LENGTH 0x0f
>>> +#define IEEE_OUI_MHL3 0x7CA61D
>> Should these be in mhl.h?
>>
>> Some of these seem similar to the infoframe related defs
>> in include/linux/hdmi.h
>>
>> Do you think there should be equivalent helpers for mhl infoframes
>> similar to hdmi_vendor_infoframe_init
>> and hdmi_vendor_infoframe_pack()?
>
> Answer is yes, IMHO, for both questions, but since the only
> documentation I have access to is vendor code I am little bit hesitant
> in pushing such things into mhl header.
> I am not sure if I can properly describe all fields of MHL3 VSIF
> infoframe, but beside this I have no objections :)
I think it should be okay to move these in mhl.h. I think we should drop
the version macro, though. The hdmi helpers don't created macros for
the infoframe numbers either.
> One thing is in case of implementing mhl infoframe helpers: where to put
> them to, ie which file?
I guess we could eventually have a new mhl helper, similar to
drivers/video/hdmi.c. The mhl helper probably could sit in
the bridge folder for now, since I have only heard of MHL
being implemented as an external bridge chip.
For now, you could maybe add a comment saying that these funcs can
potentially be helpers, and give them non-sil8620 name.
Thanks,
Archit
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