[POC 15/16] arm64: dts: mt8173: add GPU device

[Ulrich Hecht]

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas at gmail.com>
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi | 41 ++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index f454efa33..43775a6 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -279,6 +279,11 @@
 					cooling-device = <&cpu2 0 0>;
 					contribution = <1024>;
 				};
+				map at 2 {
+					trip = <&target>;
+					cooling-device = <&gpu 0 0>;
+					contribution = <2048>;
+				};
 			};
 		};
 	};
@@ -884,6 +889,42 @@
 			};
 		};
 
+		mfgsys: mfgsys at 13fff000 {
+			compatible = "mediatek,mt8173-mfgsys", "syscon";
+			reg = <0 0x13fff000 0 0x1000>;
+			#clock-cells = <1>;
+		};
+
+		gpu: mfgsys-gpu at 13000000 {
+			compatible = "mediatek,mt8173-gpu";
+			reg = <0 0x13000000 0 0xffff>, <0 0x13fff000 0 0x1000>;
+			power-domains =	<&scpsys MT8173_POWER_DOMAIN_MFG_ASYNC>,
+					<&scpsys MT8173_POWER_DOMAIN_MFG_2D>,
+					<&scpsys MT8173_POWER_DOMAIN_MFG>;
+			clocks = <&apmixedsys CLK_APMIXED_MMPLL>,
+				 <&topckgen CLK_TOP_MEM_MFG_IN_SEL>,
+				 <&topckgen CLK_TOP_AXI_MFG_IN_SEL>,
+				 <&topckgen CLK_TOP_AXI_SEL>,
+				 <&topckgen CLK_TOP_MEM_SEL>,
+				 <&topckgen CLK_TOP_MFG_SEL>,
+				 <&topckgen CLK_TOP_MMPLL>,
+				 <&clk26m>;
+			clock-names = "mmpll_clk",
+				      "mfg_mem_in_sel",
+				      "mfg_axi_in_sel",
+				      "top_axi",
+				      "top_mem",
+				      "top_mfg",
+				      "top_mmpll",
+				      "clk26m";
+			interrupts = <0 217 IRQ_TYPE_LEVEL_LOW>;
+			interrupt-names = "RGX";
+			status = "disabled";
+			#cooling-cells = <2>;
+			#cooling-min-level = <0>;
+			#cooling-max-level = <3>;
+		};
+
 		mmsys: clock-controller at 14000000 {
 			compatible = "mediatek,mt8173-mmsys", "syscon";
 			reg = <0 0x14000000 0 0x1000>;
-- 
2.7.4