[PATCH 6/6] drm/amdgpu: add VM support for huge pages v2
Deucher, Alexander
Alexander.Deucher at amd.com
Thu Oct 5 19:19:29 UTC 2017
> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, October 05, 2017 9:08 AM
> To: amd-gfx at lists.freedesktop.org; dri-devel at lists.freedesktop.org
> Subject: [PATCH 6/6] drm/amdgpu: add VM support for huge pages v2
>
> From: Christian König <christian.koenig at amd.com>
>
> Convert GTT mappings into linear ones for huge page handling.
>
> v2: use fragment size as minimum for linear conversion
>
> Signed-off-by: Christian König <christian.koenig at amd.com>
> Reviewed-by: Felix Kuehling <Felix.Kuehling at amd.com>
Series is:
Acked-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 25
> ++++++++++++++++++++++---
> 1 file changed, 22 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index bca9eeb..faedecc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -1698,6 +1698,7 @@ static int amdgpu_vm_bo_split_mapping(struct
> amdgpu_device *adev,
> struct drm_mm_node *nodes,
> struct dma_fence **fence)
> {
> + unsigned min_linear_pages = 1 << adev-
> >vm_manager.fragment_size;
> uint64_t pfn, start = mapping->start;
> int r;
>
> @@ -1732,6 +1733,7 @@ static int amdgpu_vm_bo_split_mapping(struct
> amdgpu_device *adev,
> }
>
> do {
> + dma_addr_t *dma_addr = NULL;
> uint64_t max_entries;
> uint64_t addr, last;
>
> @@ -1745,15 +1747,32 @@ static int amdgpu_vm_bo_split_mapping(struct
> amdgpu_device *adev,
> }
>
> if (pages_addr) {
> + uint64_t count;
> +
> max_entries = min(max_entries, 16ull * 1024ull);
> - addr = 0;
> + for (count = 1; count < max_entries; ++count) {
> + uint64_t idx = pfn + count;
> +
> + if (pages_addr[idx] !=
> + (pages_addr[idx - 1] + PAGE_SIZE))
> + break;
> + }
> +
> + if (count < min_linear_pages) {
> + addr = pfn << PAGE_SHIFT;
> + dma_addr = pages_addr;
> + } else {
> + addr = pages_addr[pfn];
> + max_entries = count;
> + }
> +
> } else if (flags & AMDGPU_PTE_VALID) {
> addr += adev->vm_manager.vram_base_offset;
> + addr += pfn << PAGE_SHIFT;
> }
> - addr += pfn << PAGE_SHIFT;
>
> last = min((uint64_t)mapping->last, start + max_entries - 1);
> - r = amdgpu_vm_bo_update_mapping(adev, exclusive,
> pages_addr, vm,
> + r = amdgpu_vm_bo_update_mapping(adev, exclusive,
> dma_addr, vm,
> start, last, flags, addr,
> fence);
> if (r)
> --
> 2.7.4
>
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