[PATCH] drm/vc4: Fix sleeps during the IRQ handler for DSI transactions.

[Boris Brezillon]

On Thu, 17 Aug 2017 14:04:55 -0700
Eric Anholt <eric at anholt.net> wrote:

> VC4's DSI1 has a bug where the AXI connection is broken for 32-bit
> writes from the CPU, so we use the DMA engine to DMA 32-bit values
> into registers instead.  That sleeps, so we can't do it from the top
> half.
> 
> As a solution (suggested by Arnd), we can mask the IRQ in the irqchip
> in the top half, and re-enable it from an irqthread.
> 
> Signed-off-by: Eric Anholt <eric at anholt.net>
> ---
>  drivers/gpu/drm/vc4/vc4_dsi.c | 39 +++++++++++++++++++++++++++++++++++++--
>  1 file changed, 37 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c
> index ec1d646b3151..9556236b67d0 100644
> --- a/drivers/gpu/drm/vc4/vc4_dsi.c
> +++ b/drivers/gpu/drm/vc4/vc4_dsi.c
> @@ -516,6 +516,8 @@ struct vc4_dsi {
>  	/* Whether we're on bcm2835's DSI0 or DSI1. */
>  	int port;
>  
> +	int irq;
> +
>  	/* DSI channel for the panel we're connected to. */
>  	u32 channel;
>  	u32 lanes;
> @@ -1360,6 +1362,28 @@ static void dsi_handle_error(struct vc4_dsi *dsi,
>  	*ret = IRQ_HANDLED;
>  }
>  
> +/* Initial handler for port 1 where we need the reg_dma workaround.
> + * The register DMA writes sleep, so we can't do it in the top half.
> + * Instead we just disable the interrupt in the only way we have
> + * available (mask it in the irqchip), and continue on to the threaded
> + * handler.
> + */
> +static irqreturn_t vc4_dsi_irq_defer_to_thread_handler(int irq, void *data)
> +{
> +	struct vc4_dsi *dsi = data;
> +	u32 stat = DSI_PORT_READ(INT_STAT);
> +
> +	if (!stat)
> +		return IRQ_NONE;
> +
> +	disable_irq_nosync(dsi->irq);

Are you sure you need to explicitly disable the IRQ here? Did you try
with an IRQF_ONESHOT flag when registering your irq handler (this
should do exactly what you're doing here: mask the interrupt until
the threaded handler returns IRQ_DONE or IRQ_NONE [1])?

[1]http://elixir.free-electrons.com/linux/v4.3.2/source/include/linux/interrupt.h#L50

> +
> +	return IRQ_WAKE_THREAD;
> +}
> +
> +/* Normal IRQ handler for port 0, or the threaded IRQ handler for port
> + * 1 where we need the reg_dma workaround.
> + */
>  static irqreturn_t vc4_dsi_irq_handler(int irq, void *data)
>  {
>  	struct vc4_dsi *dsi = data;
> @@ -1368,6 +1392,9 @@ static irqreturn_t vc4_dsi_irq_handler(int irq, void *data)
>  
>  	DSI_PORT_WRITE(INT_STAT, stat);
>  
> +	if (dsi->reg_dma_mem)
> +		enable_irq(dsi->irq);
> +
>  	dsi_handle_error(dsi, &ret, stat,
>  			 DSI1_INT_ERR_SYNC_ESC, "LPDT sync");
>  	dsi_handle_error(dsi, &ret, stat,
> @@ -1539,8 +1566,16 @@ static int vc4_dsi_bind(struct device *dev, struct device *master, void *data)
>  	/* Clear any existing interrupt state. */
>  	DSI_PORT_WRITE(INT_STAT, DSI_PORT_READ(INT_STAT));
>  
> -	ret = devm_request_irq(dev, platform_get_irq(pdev, 0),
> -			       vc4_dsi_irq_handler, 0, "vc4 dsi", dsi);
> +	dsi->irq = platform_get_irq(pdev, 0);
> +	if (dsi->reg_dma_mem) {
> +		ret = devm_request_threaded_irq(dev, dsi->irq,
> +						vc4_dsi_irq_defer_to_thread_handler,
> +						vc4_dsi_irq_handler, 0,
> +						"vc4 dsi", dsi);
> +	} else {
> +		ret = devm_request_irq(dev, dsi->irq,
> +				       vc4_dsi_irq_handler, 0, "vc4 dsi", dsi);
> +	}
>  	if (ret) {
>  		if (ret != -EPROBE_DEFER)
>  			dev_err(dev, "Failed to get interrupt: %d\n", ret);