[Bug 102511] RV770 error on change dpm balanced<->battery

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=102511

            Bug ID: 102511
           Summary: RV770 error on change dpm balanced<->battery
           Product: DRI
           Version: unspecified
          Hardware: x86-64 (AMD64)
                OS: Linux (All)
            Status: NEW
          Severity: minor
          Priority: medium
         Component: DRM/Radeon
          Assignee: dri-devel at lists.freedesktop.org
          Reporter: rob.mackinnon at gmail.com

* Overview:
I decided today I would troubleshoot/source an error that has been plaguing my
dmesg:

[drm:btc_dpm_set_power_state [radeon]] *ERROR*
rv770_restrict_performance_levels_before_switch failed

Over all this bug may or may not be related to #91375. I dug into the DPM
setting and levels and was happy to find that switching from "performance" to
"battery" (and vice versa) did not reproduce this bug. What did reproduce the
bug was switching from "balanced" and "battery" (and vice versa).

Kernel version: 4.11.12
Linux Firmware version: 20170519
X.org server version: 1.19.3
Mesa version: 17.2.0_rc5
libdrm version: 2.4.82
Gnome version: 3.24

* Steps to Reproduce:
echo battery > /sys/class/drm/card0/device/power_dpm_state
echo balanced > /sys/class/drm/card0/device/power_dpm_state

* Actual Result:
- DPMS change level changes as expected.
- Dmesg:
[ 3302.814889] [drm:btc_dpm_set_power_state [radeon]] *ERROR*
rv770_restrict_performance_levels_before_switch failed
[ 3316.661933] [drm:btc_dpm_set_power_state [radeon]] *ERROR*
rv770_restrict_performance_levels_before_switch failed

* Expected result:
- DPMS change level changes as expected.
- No error messages in dmesg.

* Additional Info:
Also, not sure if this is related or not, when switching from "battery" to
"performance" there sometimes appears to be an initial clocking issue (which I
believe is related to #93753). Switching back and forth a few times seems to
clean it.  Unsure the cause.  Another note, upon further inspection of my DPMS
settings, I noticed the drastic differences between "balanced" and "battery"
`sclk`s. My understand (which could be faulty) is that `sclk` drives the
clocking for single displays, while `mclk` for multiple. My laptop rig has 2 DP
displays (3 if I could get it to drive the LVDS display with the 2 DPs, but
that is another issue for another bug another day)

# echo battery > /sys/class/drm/card0/device/power_dpm_state
# cat /sys/kernel/debug/dri/0/radeon_pm_info 
uvd    vclk: 0 dclk: 0
power level 2    sclk: 30000 mclk: 30000 vddc: 900 vddci: 0

# echo balanced > /sys/class/drm/card0/device/power_dpm_state
# cat /sys/kernel/debug/dri/0/radeon_pm_info 
uvd    vclk: 0 dclk: 0
power level 0    sclk: 25000 mclk: 90000 vddc: 1100 vddci: 0


# echo performance > /sys/class/drm/card0/device/power_dpm_state
# cat /sys/kernel/debug/dri/0/radeon_pm_info 
uvd    vclk: 0 dclk: 0
power level 2    sclk: 75000 mclk: 90000 vddc: 1100 vddci: 0

*Video Card:
01:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI]
Seymour [Radeon HD 6400M/7400M Series] (prog-if 00 [VGA controller])
        Subsystem: Hewlett-Packard Company Radeon HD 6470M
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx+
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort-
<MAbort- >SERR- <PERR- INTx-
        Latency: 0, Cache Line Size: 64 bytes
        Interrupt: pin A routed to IRQ 37
        Region 0: Memory at c0000000 (64-bit, prefetchable) [size=256M]
        Region 2: Memory at d4400000 (64-bit, non-prefetchable) [size=128K]
        Region 4: I/O ports at 4000 [size=256]
        Expansion ROM at 000c0000 [disabled] [size=128K]
        Capabilities: <access denied>
        Kernel driver in use: radeon
        Kernel modules: radeon

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