[radeon-alex:drm-next-4.18-wip 257/261] drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/ppatomctrl.c:323:2: warning: missing braces around initializer
kbuild test robot
lkp at intel.com
Thu Apr 26 15:52:07 UTC 2018
tree: git://people.freedesktop.org/~agd5f/linux.git drm-next-4.18-wip
head: 92fb37464bd2b759d74f33c3b90a27575601745d
commit: 414643871e4c144d7a7a41d14d889fe32089f0e0 [257/261] drm/amd/powerplay: update ppatomctrl.c (v2)
config: i386-randconfig-a0-201816 (attached as .config)
compiler: gcc-4.9 (Debian 4.9.4-2) 4.9.4
reproduce:
git checkout 414643871e4c144d7a7a41d14d889fe32089f0e0
# save the attached .config to linux build tree
make ARCH=i386
All warnings (new ones prefixed by >>):
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/ppatomctrl.c: In function 'atomctrl_get_memory_pll_dividers_ai':
>> drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/ppatomctrl.c:323:2: warning: missing braces around initializer [-Wmissing-braces]
COMPUTE_MEMORY_CLOCK_PARAM_PARAMETERS_V2_3 mpll_parameters = {0};
^
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/ppatomctrl.c:323:2: warning: (near initialization for 'mpll_parameters.ulClock') [-Wmissing-braces]
vim +323 drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/ppatomctrl.c
317
318 int atomctrl_get_memory_pll_dividers_ai(struct pp_hwmgr *hwmgr,
319 uint32_t clock_value,
320 pp_atomctrl_memory_clock_param_ai *mpll_param)
321 {
322 struct amdgpu_device *adev = hwmgr->adev;
> 323 COMPUTE_MEMORY_CLOCK_PARAM_PARAMETERS_V2_3 mpll_parameters = {0};
324 int result;
325
326 mpll_parameters.ulClock.ulClock = cpu_to_le32(clock_value);
327
328 result = amdgpu_atom_execute_table(adev->mode_info.atom_context,
329 GetIndexIntoMasterTable(COMMAND, ComputeMemoryClockParam),
330 (uint32_t *)&mpll_parameters);
331
332 /* VEGAM's mpll takes sometime to finish computing */
333 udelay(10);
334
335 if (!result) {
336 mpll_param->ulMclk_fcw_int =
337 le16_to_cpu(mpll_parameters.usMclk_fcw_int);
338 mpll_param->ulMclk_fcw_frac =
339 le16_to_cpu(mpll_parameters.usMclk_fcw_frac);
340 mpll_param->ulClock =
341 le32_to_cpu(mpll_parameters.ulClock.ulClock);
342 mpll_param->ulPostDiv = mpll_parameters.ulClock.ucPostDiv;
343 }
344
345 return result;
346 }
347
---
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