[PATCH 0/5] msm/drm: A6x DCVS series

Sharat Masetty smasetty at codeaurora.org
Thu Aug 23 09:18:26 UTC 2018


This patch series starts off with a few bug fixes in devfreq code, followed by
refactoring the devfreq code needed for supporting different chipsets, and
ends with adding devfreq support for A6x.

Sharat Masetty (5):
  drm/msm: suspend devfreq on init
  drm/msm: unregister devfreq upon clean up
  drm/msm/A6x: Add gmu_read64() register read op
  drm/msm: re-factor devfreq code
  drm/msm/A6x: Add devfreq support in A6x

 drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 16 ++++++++---
 drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 46 ++++++++++++++++++++++++++----
 drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 15 ++++++++++
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 27 ++++++++++++++++++
 drivers/gpu/drm/msm/adreno/a6xx_gpu.h |  2 ++
 drivers/gpu/drm/msm/msm_gpu.c         | 53 +++++++++++++++++++++--------------
 drivers/gpu/drm/msm/msm_gpu.h         |  5 +++-
 7 files changed, 133 insertions(+), 31 deletions(-)

--
1.9.1



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