[PATCH v2 1/5] drm/vc4: Fix TILE_Y_OFFSET definitions

[Boris Brezillon]

On Fri,  3 Aug 2018 11:22:27 +0200
Boris Brezillon <boris.brezillon at bootlin.com> wrote:

> From: Eric Anholt <eric at anholt.net>
> 
> Y_OFFSET field starts at bit 8 not 7.
> 
> Signed-off-by: Eric Anholt <eric at anholt.net>
> Signed-off-by: Boris Brezillon <boris.brezillon at bootlin.com>

Queued the series to drm-misc-fixes.

> ---
> Changes in v2:
> - None
> ---
>  drivers/gpu/drm/vc4/vc4_regs.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h
> index d6864fa4bd14..ccbd6b377ffe 100644
> --- a/drivers/gpu/drm/vc4/vc4_regs.h
> +++ b/drivers/gpu/drm/vc4/vc4_regs.h
> @@ -1043,8 +1043,8 @@ enum hvs_pixel_format {
>  #define SCALER_PITCH0_TILE_LINE_DIR		BIT(15)
>  #define SCALER_PITCH0_TILE_INITIAL_LINE_DIR	BIT(14)
>  /* Y offset within a tile. */
> -#define SCALER_PITCH0_TILE_Y_OFFSET_MASK	VC4_MASK(13, 7)
> -#define SCALER_PITCH0_TILE_Y_OFFSET_SHIFT	7
> +#define SCALER_PITCH0_TILE_Y_OFFSET_MASK	VC4_MASK(13, 8)
> +#define SCALER_PITCH0_TILE_Y_OFFSET_SHIFT	8
>  #define SCALER_PITCH0_TILE_WIDTH_R_MASK		VC4_MASK(6, 0)
>  #define SCALER_PITCH0_TILE_WIDTH_R_SHIFT	0
>