[PATCH v3 0/4] msm/drm: A6xx DCVS series
Sharat Masetty
smasetty at codeaurora.org
Fri Aug 31 05:54:34 UTC 2018
This patch series starts off with a bug fixes in devfreq code, followed by
refactoring the devfreq code needed for supporting different chipsets, and
ends with adding devfreq support for A6xx.
v2, v3: Addressed review comments from Jordan Crouse.
Sharat Masetty (4):
drm/msm: suspend devfreq on init
drm/msm/A6xx: Add gmu_read64() register read op
drm/msm: re-factor devfreq code
drm/msm/A6xx: Add devfreq support for A6xx
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 16 ++++++++---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 39 ++++++++++++++++++++++++---
drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 12 +++++++++
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 27 +++++++++++++++++++
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 2 ++
drivers/gpu/drm/msm/msm_gpu.c | 51 ++++++++++++++++++++---------------
drivers/gpu/drm/msm/msm_gpu.h | 5 +++-
7 files changed, 122 insertions(+), 30 deletions(-)
--
1.9.1
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