[Intel-gfx] [PATCH v7 2/2] drm/i915: Adding YUV444 packed format(DRM_FORMAT_XYUV) support.

[Ville Syrjälä]

On Fri, Aug 31, 2018 at 07:24:48AM +0000, Lisovskiy, Stanislav wrote:
> On Thu, 2018-08-30 at 11:15 -0700, Dhinakaran Pandiyan wrote:
> > On Thu, 2018-08-30 at 13:57 +0100, Lisovskiy, Stanislav wrote:
> > > On Wed, 2018-08-29 at 12:16 -0700, Dhinakaran Pandiyan wrote:
> > > > 
> > > > On Wed, 2018-08-29 at 21:10 +0300, Ville Syrjälä wrote:
> > > > > On Wed, Aug 29, 2018 at 02:28:47PM +0300, Stanislav Lisovskiy
> > > > > wrote:
> > > > > > PLANE_CTL_FORMAT_AYUV is already supported, according to
> > > > > > hardware
> > > > > > specification.
> > > > > > 
> > > > > > v2: Edited commit message, removed redundant whitespaces.
> > > > > > 
> > > > > > v3: Fixed fallthrough logic for the format switch cases.
> > > > > > 
> > > > > > v4: Yet again fixed fallthrough logic, to reuse code from
> > > > > > other
> > > > > > case
> > > > > >     labels.
> > > > > > 
> > > > > > v5: Started to use XYUV instead of AYUV, as we don't use
> > > > > > alpha.
> > 
> > Curious what the reason is. Is it because the hardware does not
> > support
> > alpha with this format?
> 
> As I understood yes, this is a hardware limitation.
> 
> > 
> > > > > > 
> > > > > > v6: Removed unneeded initializer for new XYUV format.
> > > > > > 
> > > > > > v7: Added scaling support for DRM_FORMAT_XYUV
> > > > 
> > > > I don't see yuv formats in skl_format_to_fourcc(), any idea why?
> > > 
> > > Good point. I guess would be nice idea to add at least XYUV there
> > > now.
> > > I can add rest of the formats with a separate patch afterwards.
> > 
> > Wonder if the expectation is BIOS not use yuv formats. Ville?
> 
> I talked to Ville yesterday, I think that was basically what he said.

Yes. Although I have this dream of full plane state readout (which we
could then use for verification purposes at least), so adding the
missing formats there would be a decent idea.

-- 
Ville Syrjälä
Intel