[PATCH v5] arm64: dts: sdm845: Add display nodes to MTP dts

[Abhinav Kumar]

Add the display nodes containing information about the panel,
DSI configuration and board specific pin configuration to the
SDM845 MTP device tree file.

This patch depends on the following:

https://patchwork.freedesktop.org/series/51909/

Changes in v4:
	- patch introduced in the series
	- move around added nodes to preserve alphabetical order (Doug Anderson)

Changes in v5:
	- include board specific pin configuration (Doug Anderson)
	- remove display timing from the panel node

Signed-off-by: Sandeep Panda <spanda at codeaurora.org>
Signed-off-by: Jeykumar Sankaran <jsanka at codeaurora.org>
Signed-off-by: Abhinav Kumar <abhinavk at codeaurora.org>
---
 arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 118 ++++++++++++++++++++++++++++++++
 1 file changed, 118 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
index d667eee..ee63783 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
@@ -7,6 +7,7 @@
 
 /dts-v1/;
 
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
 #include "sdm845.dtsi"
 
@@ -343,11 +344,98 @@
 	};
 };
 
+&dsi0 {
+	status = "okay";
+	qcom,dual-dsi-mode;
+	qcom,master-dsi;
+	qcom,sync-dual-dsi;
+
+	vdda-supply = <&vdda_mipi_dsi0_1p2>;
+
+	panel at 0 {
+		compatible = "truly,nt35597-2K-display";
+		reg = <0>;
+
+		vdda-supply = <&vreg_l14a_1p88>;
+		vdispp-supply = <&lab_regulator>;
+		vdispn-supply = <&ibb_regulator>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&disp_mode_sel &lcd_reset_n>;
+
+		mode-gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
+		reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			port at 0 {
+				reg = <0>;
+				panel0_in: endpoint {
+					remote-endpoint = <&dsi0_out>;
+				};
+			};
+
+			port at 1 {
+				reg = <1>;
+				panel1_in: endpoint {
+					remote-endpoint = <&dsi1_out>;
+				};
+			};
+		};
+	};
+
+	ports {
+		port at 1 {
+			endpoint {
+				remote-endpoint = <&panel0_in>;
+				data-lanes = <0 1 2 3>;
+			};
+		};
+	};
+};
+
+&dsi0_phy {
+	status = "okay";
+	vdds-supply = <&vdda_mipi_dsi0_pll>;
+};
+
+&dsi1 {
+	status = "okay";
+
+	qcom,dual-dsi-mode;
+	qcom,sync-dual-dsi;
+
+	vdda-supply = <&vdda_mipi_dsi1_1p2>;
+
+	ports {
+		port at 1 {
+			endpoint {
+				remote-endpoint = <&panel1_in>;
+				data-lanes = <0 1 2 3>;
+			};
+		};
+	};
+};
+
+&dsi1_phy {
+	status = "okay";
+	vdds-supply = <&vdda_mipi_dsi1_pll>;
+};
+
 &i2c10 {
 	status = "okay";
 	clock-frequency = <400000>;
 };
 
+&mdss {
+	status = "okay";
+};
+
+&mdss_mdp {
+	status = "okay";
+};
+
 &qupv3_id_1 {
 	status = "okay";
 };
@@ -444,3 +532,33 @@
 		bias-pull-up;
 	};
 };
+
+ /* PINCTRL - board-specific pinctrl */
+
+&tlmm {
+	disp_mode_sel: disp-mode-sel {
+		pinmux {
+			function = "gpio";
+			pins = "gpio52";
+		};
+
+		pinconf {
+			pins = "gpio52";
+			drive-strength = <8>;
+			bias-disable;
+		};
+	};
+
+	lcd_reset_n: lcd-reset-n {
+		pinmux {
+			function = "gpio";
+			pins = "gpio6";
+		};
+
+		pinconf {
+			pins = "gpio6";
+			drive-strength = <8>;
+			bias-disable;
+		};
+	};
+};
-- 
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