[PATCH 22/29] drm/omap: Move DISPC timing checks to CRTC .mode_valid() operation
Sebastian Reichel
sebastian.reichel at collabora.com
Tue Dec 11 01:07:45 UTC 2018
Hi,
On Mon, Dec 10, 2018 at 02:14:01PM +0100, Sebastian Reichel wrote:
> On Mon, Dec 10, 2018 at 09:50:08AM +0200, Laurent Pinchart wrote:
> > Hi Sebastian,
> >
> > On Monday, 10 December 2018 00:07:55 EET Sebastian Reichel wrote:
> > > On Wed, Dec 05, 2018 at 05:00:15PM +0200, Laurent Pinchart wrote:
> > > > The DISPC timings checks relate to the CRTC, but they're performed in
> > > > the encoder and connector .atomic_check() and .mode_valid() operations.
> > > > Move them to the CRTC .mode_valid() operation.
> > > >
> > > > Signed-off-by: Laurent Pinchart <laurent.pinchart at ideasonboard.com>
> > > > ---
> > >
> > > Reviewed-by: Sebastian Reichel <sebastian.reichel at collabora.com>
> > >
> > > This should also fix the issue with DSI in a less ugly way:
> > >
> > > https://lists.freedesktop.org/archives/dri-devel/2018-November/196622.html
> >
> > Should I add the
> >
> > Fixes: 7c27fa57ef31 ("drm/omap: Call dispc timings check operation directly")
> >
> > tag to this patch ?
>
> I plan to test this series in combination with my DSI patches today
> or tomorrow evening. If it works, probably the following should be
> added to the patch description:
>
> --------------------
> As a side-effect this fixes DSI, which uses slightly different mode
> configuration for the DSI encoder and the DISPC.
>
> Fixes: 7c27fa57ef31 ("drm/omap: Call dispc timings check operation directly")
> --------------------
I merged this series with my remaining DSI command mode patches
(btw. this series does not apply cleanly to master due to a recent
patch from Tomi). Unfortunately this patch does not fix the issue.
After this patch the mgr_check_timings() call in omap_crtc_mode_valid()
will fail.
The good news: The Droid 4 display worked again after dropping the
mgr_check_timings call as a quick hack. So the other patches from
this set are
Tested-by: Sebastian Reichel <sebastian.reichel at collabora.com>
The problem is, that DISPC timings for DSI are not directly
calculated from mode. Instead DSI code does some modifications
before applying the DISPC settings.
-- Sebastian
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