[PATCH v2] drm/i915: correct the pitch check for NV12 framebuffer

[Ville Syrjälä]

On Tue, Dec 11, 2018 at 04:39:05PM -0800, Dongseong Hwang wrote:
> framebuffer for NV12 requires the pitch to the multiplier of 4, instead
> of the width. This patch corrects it.
> 
> For instance, a 480p video, whose width and pitch are 854 and 896
> respectively, is excluded for NV12 plane so far.
> 
> Signed-off-by: Dongseong Hwang <dongseong.hwang at intel.com>
> Cc: Chandra Konduru <chandra.konduru at intel.com>
> Cc: Vidya Srinivas <vidya.srinivas at intel.com>
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Cc: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 13e5650..8a3de12 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -14600,7 +14600,7 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
>  	if (fb->format->format == DRM_FORMAT_NV12 &&
>  	    (fb->width < SKL_MIN_YUV_420_SRC_W ||
>  	     fb->height < SKL_MIN_YUV_420_SRC_H ||
> -	     (fb->width % 4) != 0 || (fb->height % 4) != 0)) {
> +	     (fb->pitches[0] % 4) != 0 || (fb->height % 4) != 0)) {

The stride can never be misaligned like that. It'll be at least tile
aligned, or 64 byte aligned with linear buffers.

Anyways this entire piece of code doesn't make too much sense. The fb
size doesn't really matter for us, only the src viewport size matters.
That one we limit to a minimum of 2x2 pixels w/o scaling, and 16x16
pixems w/ scaling. So looks like this code can be just ripped out.

>  		DRM_DEBUG_KMS("src dimensions not correct for NV12\n");
>  		goto err;
>  	}
> -- 
> 2.7.4

-- 
Ville Syrjälä
Intel