[Intel-gfx] [PATCH 5/8] drm/i915: Fix plane YCbCr->RGB conversion for GLK

Imre Deak imre.deak at intel.com
Wed Feb 28 20:43:13 UTC 2018


On Wed, Feb 14, 2018 at 09:23:24PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> On GLK the plane CSC controls moved into the COLOR_CTL register.
> Update the code to progam the YCbCr->RGB CSC mode correctly when
> faced with an YCbCr framebuffer.
> 
> The spec is rather confusing as it calls the mode "YUV601 to RGB709".
> I'm going to assume that just means it's going to use the YCbCr->RGB
> matrix as specified in BT.601 and doesn't actually change the gamut.
> 
> Cc: Harry Wentland <harry.wentland at amd.com>
> Cc: Daniel Vetter <daniel at ffwll.ch>
> Cc: Daniel Stone <daniel at fooishbar.org>
> Cc: Russell King - ARM Linux <linux at armlinux.org.uk>
> Cc: Ilia Mirkin <imirkin at alum.mit.edu>
> Cc: Hans Verkuil <hverkuil at xs4all.nl>
> Cc: Uma Shankar <uma.shankar at intel.com>
> Cc: Shashank Sharma <shashank.sharma at intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Matches the spec, so:
Reviewed-by: Imre Deak <imre.deak at intel.com>

I asked for clarification in the spec about the BT.601 vs. 709 oddity you
noticed.

> ---
>  drivers/gpu/drm/i915/i915_reg.h      |  5 +++++
>  drivers/gpu/drm/i915/intel_display.c |  3 +++
>  drivers/gpu/drm/i915/intel_drv.h     |  2 ++
>  drivers/gpu/drm/i915/intel_sprite.c  | 10 +++++-----
>  4 files changed, 15 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 28b36eac064e..6abeaf64c2d2 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6463,6 +6463,11 @@ enum {
>  #define _PLANE_COLOR_CTL_3_A			0x703CC /* GLK+ */
>  #define   PLANE_COLOR_PIPE_GAMMA_ENABLE		(1 << 30)
>  #define   PLANE_COLOR_PIPE_CSC_ENABLE		(1 << 23)
> +#define   PLANE_COLOR_CSC_MODE_BYPASS			(0 << 17)
> +#define   PLANE_COLOR_CSC_MODE_YUV601_TO_RGB709		(1 << 17)
> +#define   PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709		(2 << 17)
> +#define   PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020	(3 << 17)
> +#define   PLANE_COLOR_CSC_MODE_RGB709_TO_RGB2020	(4 << 17)
>  #define   PLANE_COLOR_PLANE_GAMMA_DISABLE	(1 << 13)
>  #define   PLANE_COLOR_ALPHA_MASK		(0x3 << 4)
>  #define   PLANE_COLOR_ALPHA_DISABLE		(0 << 4)
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 286a9591d179..a22b583838f7 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -3573,6 +3573,9 @@ u32 glk_plane_color_ctl(const struct intel_crtc_state *crtc_state,
>  	plane_color_ctl |= PLANE_COLOR_PLANE_GAMMA_DISABLE;
>  	plane_color_ctl |= glk_plane_color_ctl_alpha(fb->format->format);
>  
> +	if (intel_format_is_yuv(fb->format->format))
> +		plane_color_ctl |= PLANE_COLOR_CSC_MODE_YUV601_TO_RGB709;
> +
>  	return plane_color_ctl;
>  }
>  
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 898064e8bea7..6e43da40c859 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1591,6 +1591,7 @@ u32 glk_plane_color_ctl(const struct intel_crtc_state *crtc_state,
>  			const struct intel_plane_state *plane_state);
>  u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,
>  		  const struct intel_plane_state *plane_state);
> +u32 glk_color_ctl(const struct intel_plane_state *plane_state);
>  u32 skl_plane_stride(const struct drm_framebuffer *fb, int plane,
>  		     unsigned int rotation);
>  int skl_check_plane_surface(const struct intel_crtc_state *crtc_state,
> @@ -2016,6 +2017,7 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
>  
>  
>  /* intel_sprite.c */
> +bool intel_format_is_yuv(u32 format);
>  int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
>  			     int usecs);
>  struct intel_plane *intel_sprite_plane_create(struct drm_i915_private *dev_priv,
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index fac9e01b4795..b4acde2058fe 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -41,8 +41,7 @@
>  #include <drm/i915_drm.h>
>  #include "i915_drv.h"
>  
> -static bool
> -format_is_yuv(uint32_t format)
> +bool intel_format_is_yuv(u32 format)
>  {
>  	switch (format) {
>  	case DRM_FORMAT_YUYV:
> @@ -266,6 +265,7 @@ skl_update_plane(struct intel_plane *plane,
>  	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
>  		I915_WRITE_FW(PLANE_COLOR_CTL(pipe, plane_id),
>  			      plane_state->color_ctl);
> +
>  	if (key->flags) {
>  		I915_WRITE_FW(PLANE_KEYVAL(pipe, plane_id), key->min_value);
>  		I915_WRITE_FW(PLANE_KEYMAX(pipe, plane_id), key->max_value);
> @@ -354,7 +354,7 @@ chv_update_csc(const struct intel_plane_state *plane_state)
>  	enum plane_id plane_id = plane->id;
>  
>  	/* Seems RGB data bypasses the CSC always */
> -	if (!format_is_yuv(fb->format->format))
> +	if (!intel_format_is_yuv(fb->format->format))
>  		return;
>  
>  	/*
> @@ -399,7 +399,7 @@ vlv_update_clrc(const struct intel_plane_state *plane_state)
>  	enum plane_id plane_id = plane->id;
>  	int contrast, brightness, sh_scale, sh_sin, sh_cos;
>  
> -	if (format_is_yuv(fb->format->format)) {
> +	if (intel_format_is_yuv(fb->format->format)) {
>  		/*
>  		 * Expand limited range to full range:
>  		 * Contrast is applied first and is used to expand Y range.
> @@ -1024,7 +1024,7 @@ intel_check_sprite_plane(struct intel_plane *plane,
>  		src_y = src->y1 >> 16;
>  		src_h = drm_rect_height(src) >> 16;
>  
> -		if (format_is_yuv(fb->format->format)) {
> +		if (intel_format_is_yuv(fb->format->format)) {
>  			src_x &= ~1;
>  			src_w &= ~1;
>  
> -- 
> 2.13.6
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx


More information about the dri-devel mailing list