[PATCH 2/5] drm/msm/adreno: Use generic function to load firwmare to a buffer object

[Jordan Crouse]

Move a5xx specific code to load firmware into a buffer object to
the generic Adreno code. This will come in useful for future targets.

Signed-off-by: Jordan Crouse <jordan at crouse-house.com>
---
 drivers/gpu/drm/msm/adreno/a5xx_gpu.c   | 32 ++------------------------------
 drivers/gpu/drm/msm/adreno/adreno_gpu.c | 29 +++++++++++++++++++++++++++++
 drivers/gpu/drm/msm/adreno/adreno_gpu.h |  2 ++
 3 files changed, 33 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index e8e726e..0e3943c 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -433,34 +433,6 @@ static int a5xx_preempt_start(struct msm_gpu *gpu)
 }
 
 
-static struct drm_gem_object *a5xx_ucode_load_bo(struct msm_gpu *gpu,
-		const char *fwname, u64 *iova)
-{
-	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
-	const struct firmware *fw;
-	struct drm_gem_object *bo;
-	void *ptr;
-
-	fw = adreno_request_fw(adreno_gpu, fwname);
-	if (IS_ERR(fw))
-		return ERR_CAST(fw);
-
-	ptr = msm_gem_kernel_new_locked(gpu->dev, fw->size - 4,
-		MSM_BO_UNCACHED | MSM_BO_GPU_READONLY, gpu->aspace, &bo, iova);
-
-	if (IS_ERR(ptr)) {
-		bo = ERR_CAST(ptr);
-		goto out;
-	}
-
-	memcpy(ptr, &fw->data[4], fw->size - 4);
-
-	msm_gem_put_vaddr(bo);
-out:
-	release_firmware(fw);
-	return bo;
-}
-
 static int a5xx_ucode_init(struct msm_gpu *gpu)
 {
 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
@@ -468,7 +440,7 @@ static int a5xx_ucode_init(struct msm_gpu *gpu)
 	int ret;
 
 	if (!a5xx_gpu->pm4_bo) {
-		a5xx_gpu->pm4_bo = a5xx_ucode_load_bo(gpu,
+		a5xx_gpu->pm4_bo = adreno_request_fw_bo(gpu,
 			adreno_gpu->info->pm4fw, &a5xx_gpu->pm4_iova);
 
 		if (IS_ERR(a5xx_gpu->pm4_bo)) {
@@ -481,7 +453,7 @@ static int a5xx_ucode_init(struct msm_gpu *gpu)
 	}
 
 	if (!a5xx_gpu->pfp_bo) {
-		a5xx_gpu->pfp_bo = a5xx_ucode_load_bo(gpu,
+		a5xx_gpu->pfp_bo = adreno_request_fw_bo(gpu,
 			adreno_gpu->info->pfpfw, &a5xx_gpu->pfp_iova);
 
 		if (IS_ERR(a5xx_gpu->pfp_bo)) {
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index 9253550..fc180ad 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -138,6 +138,35 @@ int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value)
 	return ERR_PTR(-ENOENT);
 }
 
+struct drm_gem_object *adreno_request_fw_bo(struct msm_gpu *gpu,
+		const char *fwname, u64 *iova)
+{
+	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
+	const struct firmware *fw;
+	struct drm_gem_object *bo;
+	void *ptr;
+
+	fw = adreno_request_fw(adreno_gpu, fwname);
+	if (IS_ERR(fw))
+		return ERR_CAST(fw);
+
+	ptr = msm_gem_kernel_new_locked(gpu->dev, fw->size - 4,
+		MSM_BO_UNCACHED | MSM_BO_GPU_READONLY, gpu->aspace, &bo, iova);
+
+	if (IS_ERR(ptr)) {
+		bo = ERR_CAST(ptr);
+		goto out;
+	}
+
+	memcpy(ptr, &fw->data[4], fw->size - 4);
+
+	msm_gem_put_vaddr(bo);
+out:
+	release_firmware(fw);
+	return bo;
+}
+
+
 int adreno_hw_init(struct msm_gpu *gpu)
 {
 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index bfdaaf2..e799dd6 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -197,6 +197,8 @@ static inline int adreno_is_a530(struct adreno_gpu *gpu)
 int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value);
 const struct firmware *adreno_request_fw(struct adreno_gpu *adreno_gpu,
 		const char *fwname);
+struct drm_gem_object *adreno_request_fw_bo(struct msm_gpu *gpu,
+		const char *fwname, u64 *iova);
 int adreno_hw_init(struct msm_gpu *gpu);
 void adreno_recover(struct msm_gpu *gpu);
 void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
-- 
1.9.1