[PATCH 0/9] Exynos DRM IPP fixes

[Marek Szyprowski]

Dear all,

This patchset is a result of running various tests of Exynos DRM IPP
modules. It turned out that some drivers incorrectly interpreted
real buffer width (calculated from buffer pitch), had swapped horizontal
and vertial flips or used incorrect variant of the YUV modes. This
patchset fixes those issues.

Best regards
Marek Szyprowski
Samsung R&D Institute Poland

Andrzej Pietrasiewicz (1):
  drm/exynos: scaler: Reset hardware before starting the operation

Marek Szyprowski (8):
  drm/exynos: ipp: Rework checking for the correct buffer formats
  drm/exynos: rotator: Fix DRM_MODE_REFLECT_{X,Y} interpretation
  drm/exynos: scaler: Fix support for YUV420, YUV422 and YUV444 modes
  drm/exynos: gsc: Use real buffer width for configuring the hardware
  drm/exynos: gsc: Increase Exynos5433 buffer width alignment to 16
    pixels
  drm/exynos: gsc: Fix DRM_MODE_REFLECT_{X,Y} interpretation
  drm/exynos: gsc: Fix support for NV16/61, YUV420/YVU420 and YUV422
    modes
  drm/exynos: fimc: Use real buffer width for configuring the hardware

 drivers/gpu/drm/exynos/exynos_drm_fimc.c    |  17 +--
 drivers/gpu/drm/exynos/exynos_drm_gsc.c     |  51 +++++----
 drivers/gpu/drm/exynos/exynos_drm_ipp.c     | 108 +++++++++++---------
 drivers/gpu/drm/exynos/exynos_drm_rotator.c |   4 +-
 drivers/gpu/drm/exynos/exynos_drm_scaler.c  |  44 ++++++--
 drivers/gpu/drm/exynos/regs-gsc.h           |   1 +
 6 files changed, 136 insertions(+), 89 deletions(-)

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2.17.1