[PATCH v12 3/5] dt-bindings: drm/bridge: Document sn65dsi86 bridge bindings
Stephen Boyd
swboyd at chromium.org
Fri Jun 22 01:12:13 UTC 2018
Quoting Sandeep Panda (2018-06-21 05:32:07)
> diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt
> new file mode 100644
> index 000000000000..c8b8f018356f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt
> @@ -0,0 +1,86 @@
> +SN65DSI86 DSI to eDP bridge chip
> +--------------------------------
> +
> +This is the binding for Texas Instruments SN65DSI86 bridge.
> +http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=sn65dsi86&fileType=pdf
> +
> +Required properties:
> +- compatible: Must be "ti,sn65dsi86"
> +- reg: i2c address of the chip, 0x2d as per datasheet
> +- enable-gpios: OF device-tree gpio specification for bridge_en pin (active high)
> +
> +- vccio-supply: A 1.8V supply that powers up the digital IOs.
> +- vpll-supply: A 1.8V supply that powers up the displayport PLL.
> +- vcca-supply: A 1.2V supply that powers up the analog circuits.
> +- vcc-supply: A 1.2V supply that powers up the digital core.
> +
> +Optional properties:
> +- interrupts-extended: Specifier for the SN65DSI86 interrupt line.
> +
> +- ddc-i2c-bus: phandle of the I2C controller used for DDC EDID probing
> +
> +- gpio-controller: Marks the device has a GPIO controller.
> +- #gpio-cells : Should be two. The first cell is the pin number and
> + the second cell is used to specify flags.
> + See ../../gpio/gpio.txt for more information.
> +- #pwm-cells : Should be one. See ../../pwm/pwm.txt for description of
> + the cell formats.
> +
> +- clock-names: should be "refclk"
> +- clocks: Specification for input reference clock. The reference
> + clock rate must be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 MHz.
> +
> +- data-lanes: See ../../media/video-interface.txt
> +- lane-polarities: See ../../media/video-interface.txt
We need another property for suspend-gpios function of GPIO1. I suppose
for the other GPIOs we don't need anything like this because they're
output functions only? GPIO4 can do PWM and I guess if pwm is used in DT
from here then the driver can mux that out of gpio4 properly. I have no
idea how the hsync and vsync GPIOs would work though. I see that GPIO3
can do DSIA hsync or vsync and GPIO2 can do DSIA vsync and I would guess
those are in output mode only. Maybe that's just another property on
this node to indicate if we should mux out the function or not. Usually
that's done from pinctrl though. I don't have a use case for those
functions but I do care about suspend gpios so at least add that one
please.
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