[Bug 198883] amdgpu: carrizo: Screen stalls after starting X

Mon Mar 12 08:12:41 UTC 2018

https://bugzilla.kernel.org/show_bug.cgi?id=198883

--- Comment #46 from Ricardo Ribalda (ricardo.ribalda at gmail.com) ---
(In reply to Nicolai Hähnle from comment #44)
> For the LLVM problem, please provide the log output from starting X with
> R600_DEBUG=vs,ps in the environment.

Here you are.

Thanks!

X.Org X Server 1.19.3
Release Date: 2017-03-15
X Protocol Version 11, Revision 0
Build Operating System: Linux 4.14.0-3-amd64 x86_64 
Current Operating System: Linux qt5122 4.16.0-rc4-qtec-standard #1 SMP Fri Mar
9 15:13:05 CET 2018 x86_64
Kernel command line: BOOT_IMAGE=/boot/bzImage rw root=PARTUUID=c839955a-02
rootwait qtec_mem.size=64 quiet
Build Date: 09 March 2018  02:29:53PM

Current version of pixman: 0.34.0
        Before reporting problems, check http://wiki.x.org
        to make sure that you have the latest version.
Markers: (--) probed, (**) from config file, (==) default setting,
        (++) from command line, (!!) notice, (II) informational,
        (WW) warning, (EE) error, (NI) not implemented, (??) unknown.
(==) Log file: "/var/log/Xorg.0.log", Time: Mon Mar 12 08:12:00 2018
(==) Using config file: "/etc/X11/xorg.conf"
(==) Using system config directory "/usr/share/X11/xorg.conf.d"
(II) [KMS] Kernel modesetting enabled.
VERT
PROPERTY NEXT_SHADER FRAG
DCL IN[0]
DCL IN[1]
DCL OUT[0], POSITION
DCL OUT[1].xy, GENERIC[0]
  0: MOV OUT[0], IN[0]
  1: MOV OUT[1].xy, IN[1].xyxx
  2: END
radeonsi: Compiling shader 1
TGSI shader LLVM IR:

; ModuleID = 'tgsi'
source_filename = "tgsi"
target datalayout =
"e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-A5"
target triple = "amdgcn--"

define amdgpu_vs void @main([12 x <4 x i32>] addrspace(2)* byval noalias
dereferenceable(18446744073709551615), [0 x <8 x i32>] addrspace(2)* byval
noalias dereferenceable(18446744073709551615), [0 x <4 x i32>] addrspace(2)*
byval noalias dereferenceable(18446744073709551615), [80 x <8 x i32>]
addrspace(2)* byval noalias dereferenceable(18446744073709551615), [16 x <4 x
i32>] addrspace(2)* byval noalias dereferenceable(18446744073709551615), i32
inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32) #0 {
main_body:
  %15 = getelementptr [16 x <4 x i32>], [16 x <4 x i32>] addrspace(2)* %4, i32
0, i32 0, !amdgpu.uniform !0
  %16 = load <4 x i32>, <4 x i32> addrspace(2)* %15, align 16, !invariant.load
!0
  %17 = call nsz <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32>
%16, i32 %13, i32 0, i1 false, i1 false) #3
  %18 = extractelement <4 x float> %17, i32 0
  %19 = extractelement <4 x float> %17, i32 1
  %20 = extractelement <4 x float> %17, i32 2
  %21 = extractelement <4 x float> %17, i32 3
  %22 = getelementptr [16 x <4 x i32>], [16 x <4 x i32>] addrspace(2)* %4, i32
0, i32 1, !amdgpu.uniform !0
  %23 = load <4 x i32>, <4 x i32> addrspace(2)* %22, align 16, !invariant.load
!0
  %24 = call nsz <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32>
%23, i32 %14, i32 0, i1 false, i1 false) #3
  %25 = extractelement <4 x float> %24, i32 0
  %26 = extractelement <4 x float> %24, i32 1
  call void @llvm.amdgcn.exp.f32(i32 12, i32 15, float %18, float %19, float
%20, float %21, i1 true, i1 false) #2
  call void @llvm.amdgcn.exp.f32(i32 32, i32 15, float %25, float %26, float
undef, float undef, i1 false, i1 false) #2
  ret void
}

; Function Attrs: nounwind readonly
declare <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32>, i32, i32,
i1, i1) #1

; Function Attrs: nounwind
declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1)
#2

attributes #0 = { "no-signed-zeros-fp-math"="true" }
attributes #1 = { nounwind readonly }
attributes #2 = { nounwind }
attributes #3 = { nounwind readnone }

!0 = !{}

LLVM ERROR: Cannot select: 0x12844a0: v4i32,ch =
load<LD16[%22(addrspace=2)](dereferenceable)(invariant)> 0xc352c8, 0x1284438,
undef:i32
  0x1284438: i32 = add 0x127df58, Constant:i32<16>
    0x127df58: i32,ch = CopyFromReg 0xc352c8, Register:i32 %4
      0x127def0: i32 = Register %4
    0x12843d0: i32 = Constant<16>
  0x127e848: i32 = undef
In function: main

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