[PATCH] drm/tilcdc: Fix setting clock divider for omap-l138

[Jyri Sarha]

Thanks,
I'll pick this for v4.18.

Best regards,
Jyri

On 15/03/18 00:58, David Lechner wrote:
> This fixes setting the clock divider on the TI OMAP-L138 LCDK board.
> 
> The clock drivers for OMAP-L138 are being covernted to the common clock
> framework. When this happens, clk_set_rate() will no longer return an
> error. However, on this SoC, the clock rate cannot actually be changed
> because the clock has to maintain a fixed ratio to the ARM clock. So
> after attempting to set the clock rate, we need to check to see if the
> new rate is actually close enough. If not, then follow the previous
> error path to adjust the divider in LCDC IP block to compensate for not
> being able to change the parent clock rate.
> 
> Tested working on a TI OMAP-L138 LCDK board.
> 
> Signed-off-by: David Lechner <david at lechnology.com>
> ---
>  drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> index 8bf6bb9..6931777 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> @@ -224,7 +224,7 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc)
>  
>  	ret = clk_set_rate(priv->clk, req_rate * clkdiv);
>  	clk_rate = clk_get_rate(priv->clk);
> -	if (ret < 0) {
> +	if (ret < 0 || tilcdc_pclk_diff(req_rate, clk_rate) > 5) {
>  		/*
>  		 * If we fail to set the clock rate (some architectures don't
>  		 * use the common clock framework yet and may not implement
> 


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