[PATCH v2 2/2] drm/omap: partial workaround for DRA7xx DMM errata i878

[Peter Ujfalusi]

On 2018-03-29 13:18, Tomi Valkeinen wrote:
> On 22/03/18 15:42, Peter Ujfalusi wrote:
>> From: Tomi Valkeinen <tomi.valkeinen at ti.com>
>>
>> Errata i878 says that MPU should not be used to access RAM and DMM at
>> the same time. As it's not possible to prevent MPU accessing RAM, we
>> need to access DMM via a proxy.
>>
>> This patch changes DMM driver to access DMM registers via sDMA. Instead
>> of doing a normal readl/writel call to read/write a register, we use
>> sDMA to copy 4 bytes from/to the DMM registers.
>>
>> This patch provides only a partial workaround for i878, as not only DMM
>> register reads/writes are affected, but also accesses to the DMM mapped
>> buffers (framebuffers, usually).
>>
>> Signed-off-by: Tomi Valkeinen <tomi.valkeinen at ti.com>
>> ---
>>  drivers/gpu/drm/omapdrm/omap_dmm_priv.h  |   8 ++
>>  drivers/gpu/drm/omapdrm/omap_dmm_tiler.c | 153 ++++++++++++++++++++++++++++++-
>>  2 files changed, 159 insertions(+), 2 deletions(-)
>>
> 
> 
>> +	dmm->wa_dma_chan = dma_request_channel(mask, NULL, NULL);
>> +	if (!dmm->wa_dma_chan) {
>> +		dma_free_coherent(dmm->dev, 4, dmm->wa_dma_data, dmm->wa_dma_handle);
> 
> This and the other free below should use sizeof(u32) as the alloc does.
> And I guess device_prep_dma_memcpy() too. Perhaps a #define would be
> best here. DMM_REG_SIZE? I can do this change when applying, if you agree.

Oh, there were others, I have changed it for dma_alloc_coherent().
I'll wait for couple of days for other comments and will resend with a
#define

> 
>  Tomi
> 

- Péter

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